A3PE3000-FG896 vs A3PE3000L-FGG896M Comparison

Detailed side-by-side comparison of A3PE3000-FG896 by Microchip Technology and A3PE3000L-FGG896M by Microchip Technology. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Microchip Technology
A3PE3000-FG896 A3PE3000-FG896 - ProASIC3E Flash FPGA 620 I/O | Microchip

A3PE3000-FG896 - ProASIC3E Flash FPGA 620 I/O | Microchip

A3PE3000-FG896 ✓ Active
Microchip Technology
A3PE3000L-FGG896M A3PE3000L-FGG896M - 3M-Gate Low-Power Flash FPGA | Microchip

A3PE3000L-FGG896M - 3M-Gate Low-Power Flash FPGA | Microchip

A3PE3000L-FGG896M ✓ Active

Specification Comparison

Parameter A3PE3000-FG896 A3PE3000L-FGG896M
Brand Microchip Technology Microchip Technology
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Active
Stock Status In Stock In Stock
Unit Price (USD) $129.80 $0.00
Family ProASIC3E ProASIC3L (Flash-based FPGA)
System Gates 3000000 3,000,000
Number of I/O 620 —
Embedded Memory 516096 bit —
Maximum System Frequency 231 MHz —
Process Technology 130 nm 130-nm, 7-layer metal (6 copper), flash-based CMOS
Core Supply Voltage 1.5 V —
Configuration Memory Flash (non-volatile, reprogrammable) —
Logic Element Count (per distributor listing) [DATA_NEEDED: verified LE/KLE count] —
Package 896-BGA (FBGA) 896-ball FBGA (FGG896), 1 mm pitch
Mounting Style SMD/SMT —
Operating Temperature 0 C to +70 C 0 to 70 C
Packaging Tray —
Speed Grade Standard (-) —
Architecture VersaTile 3-input LUT / D flip-flop / latch —
Global Networks VersaNet low-skew high-fanout networks —
RoHS Status Non-green package (FG prefix; FGG variants are RoHS green) —
Logic Cells — 75,264
User I/Os — Up to 616 (620 per DigiKey listing)
Embedded SRAM — 504 kbits true dual-port
Core Voltage — 1.2 V to 1.5 V
Supply Voltage — 1.5 V
Logic Family — CMOS
Mounting Type — Surface Mount
Configuration — Non-volatile flash, live-at-power-up Level 0, single-chip
Low-Power Feature — Flash*Freeze technology
Boundary Scan — IEEE 1149.1 (JTAG)
Input Features — Schmitt trigger option on single-ended inputs; weak pull-up/pull-down

Datasheets & Resources

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