ADS54J54IRGC25 vs ADS62P48IRGC25 Vergleich
Detaillierter Direktvergleich von ADS54J54IRGC25 von Texas Instruments und ADS62P48IRGC25 von Texas Instruments. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Texas Instruments
ADS54J54IRGC25 - 14-Bit 500MSPS Quad ADC | Texas Instruments
ADS54J54IRGC25 ✓ AktivTexas Instruments
ADS62P48IRGC25 - Dual 14-Bit 210MSPS ADC | Texas Instruments
ADS62P48IRGC25 ✓ AktivSpezifikationsvergleich
| Parameter | ADS54J54IRGC25 | ADS62P48IRGC25 |
|---|---|---|
| Marke | Texas Instruments | Texas Instruments |
| Kategorie | ADC/DAC | ADC/DAC |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $128,00 | $49,20 |
| Auflösung | 14 bit | 14 bit |
| Number of Channels | 4 | 2 (Dual) |
| Sample Rate | 500 MSPS per channel | — |
| Architecture | Pipelined | Pipelined |
| Digital Interface | JESD204B (subclass 0/1) | — |
| Analog Input Range | 1.5 Vpp (max) | — |
| Supply Voltage - Analog | 1.8 V | — |
| Supply Voltage - Digital | 1.0 V | — |
| Supply Voltage - I/O | 1.8 V | — |
| Input Bandwidth | [DATA_NEEDED: input bandwidth] | — |
| SNR | [DATA_NEEDED: SNR dBFS] | — |
| ENOB | [DATA_NEEDED: ENOB] | — |
| SFDR | [DATA_NEEDED: SFDR dBc] | — |
| Power Dissipation | ~1 W per channel (typ) | — |
| Betriebstemperatur | -40C to +85C | — |
| Gehäuse | 64-VQFN (RGC) 9x9 mm | — |
| Package Code | HVQCCN | — |
| Montageart | Surface Mount | Surface Mount |
| RoHS-Status | Compliant | Compliant |
| MSL-Level | [DATA_NEEDED: MSL level] | 3 |
| Sample Rate (max) | — | 210 MSPS |
| Input Type | — | Differential analog inputs |
| Output Interface | — | DDR LVDS / Parallel CMOS (selectable) |
| Analog Supply Voltage | — | 1.8 V |
| Digital Supply Voltage | — | 3.3 V |
| Betriebstemperaturbereich | — | -40 C to +85 C (Industrial) |
| Gehäuse / Bauform | — | 64-VQFN (RGC) 9x9 mm (HVQCCN) |
| Pin-Anzahl | — | 64 |
| Lead Free | — | Yes |
| Input Clock Type | — | LVDS differential clock |
| Internal Dither | — | Yes (programmable) |
| Programmable Gain | — | Yes (improves SFDR at lower FS inputs) |