EP1810LC-25 vs EP1830-20CFN Vergleich

Detaillierter Direktvergleich von EP1810LC-25 von Altera und EP1830-20CFN von Texas Instruments. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Texas Instruments
EP1830-20CFN EP1830-20CFN - 48-Macrocell CMOS EPLD, 22ns, PLCC-68 | TI

EP1830-20CFN - 48-Macrocell CMOS EPLD, 22ns, PLCC-68 | TI

EP1830-20CFN Obsolete

Spezifikationsvergleich

Parameter EP1810LC-25 EP1830-20CFN
Marke Altera Texas Instruments
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $8,40 $9,85
Product Family Altera Classic EPLD —
Part Number EP1810LC-25 —
Macrocells 48 —
Propagation Delay (tPD) 25 ns 22 ns
Dedicated Inputs 12 12
I/O Pins 48 48
External Clock Inputs 4 —
Supply Voltage (VCC) 5 V (TTL-compatible) —
Operating Mode Turbo-only (no slow-power mode) —
Gehäuse 68-pin JLCC (J-leaded ceramic chip carrier) PLCC-68 (QCCJ, J-lead)
Package Code LC = 68-pin JLCC QCCJ
Montageart Surface Mount —
Technology CMOS EPLD (erasable programmable logic device) CMOS EPROM
Programmable Interconnect Global + Local buses —
Programming Method Altera Classic programmer + MAX+PLUS II legacy flow —
Lebenszyklusstatus Obsolete (legacy Altera Classic family) —
RoHS-Status [DATA_NEEDED: RoHS compliance not confirmed in legacy datasheet] [DATA_NEEDED: RoHS status]
Betriebstemperatur [DATA_NEEDED: temperature grade for LC package] —
Device Type — Erasable Programmable Logic Device (EPLD)
Macrocell Count — 48
Maximum Supply Voltage — 5.25 V
Terminal Pitch — 1.27 mm
Terminal Form — J-Bend
Package Shape — Square
Operating Temperature Grade — Commercial (0C to 70C)
Typical Operating Current — 20 mA at 1 MHz
Maximum Counter Frequency — 50 MHz (4 x 12-bit counters)
Speed Grade — -20
Configuration Memory — Non-volatile EPROM (UV-erasable)

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