EP1810LC-25 vs EP1830-20CFN 比較
詳細な並列比較: EP1810LC-25 メーカー: Altera および EP1830-20CFN メーカー: Texas Instruments。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1810LC-25 | EP1830-20CFN |
|---|---|---|
| ブランド | Altera | Texas Instruments |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $8.40 | $9.85 |
| Product Family | Altera Classic EPLD | — |
| Part Number | EP1810LC-25 | — |
| Macrocells | 48 | — |
| Propagation Delay (tPD) | 25 ns | 22 ns |
| Dedicated Inputs | 12 | 12 |
| I/O Pins | 48 | 48 |
| External Clock Inputs | 4 | — |
| Supply Voltage (VCC) | 5 V (TTL-compatible) | — |
| Operating Mode | Turbo-only (no slow-power mode) | — |
| パッケージ | 68-pin JLCC (J-leaded ceramic chip carrier) | PLCC-68 (QCCJ, J-lead) |
| Package Code | LC = 68-pin JLCC | QCCJ |
| 実装タイプ | Surface Mount | — |
| Technology | CMOS EPLD (erasable programmable logic device) | CMOS EPROM |
| Programmable Interconnect | Global + Local buses | — |
| Programming Method | Altera Classic programmer + MAX+PLUS II legacy flow | — |
| ライフサイクル状態 | Obsolete (legacy Altera Classic family) | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance not confirmed in legacy datasheet] | [DATA_NEEDED: RoHS status] |
| 動作温度 | [DATA_NEEDED: temperature grade for LC package] | — |
| Device Type | — | Erasable Programmable Logic Device (EPLD) |
| Macrocell Count | — | 48 |
| Maximum Supply Voltage | — | 5.25 V |
| Terminal Pitch | — | 1.27 mm |
| Terminal Form | — | J-Bend |
| Package Shape | — | Square |
| Operating Temperature Grade | — | Commercial (0C to 70C) |
| Typical Operating Current | — | 20 mA at 1 MHz |
| Maximum Counter Frequency | — | 50 MHz (4 x 12-bit counters) |
| Speed Grade | — | -20 |
| Configuration Memory | — | Non-volatile EPROM (UV-erasable) |