EP1810LC-25 vs EP1830-20CFN 对比
详细并排对比 EP1810LC-25 出自 Altera 和 EP1830-20CFN 出自 Texas Instruments。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP1810LC-25 | EP1830-20CFN |
|---|---|---|
| 品牌 | Altera | Texas Instruments |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $8.40 | $9.85 |
| Product Family | Altera Classic EPLD | — |
| Part Number | EP1810LC-25 | — |
| Macrocells | 48 | — |
| Propagation Delay (tPD) | 25 ns | 22 ns |
| Dedicated Inputs | 12 | 12 |
| I/O Pins | 48 | 48 |
| External Clock Inputs | 4 | — |
| Supply Voltage (VCC) | 5 V (TTL-compatible) | — |
| Operating Mode | Turbo-only (no slow-power mode) | — |
| 封装 | 68-pin JLCC (J-leaded ceramic chip carrier) | PLCC-68 (QCCJ, J-lead) |
| Package Code | LC = 68-pin JLCC | QCCJ |
| 安装类型 | Surface Mount | — |
| Technology | CMOS EPLD (erasable programmable logic device) | CMOS EPROM |
| Programmable Interconnect | Global + Local buses | — |
| Programming Method | Altera Classic programmer + MAX+PLUS II legacy flow | — |
| 生命周期状态 | Obsolete (legacy Altera Classic family) | — |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance not confirmed in legacy datasheet] | [DATA_NEEDED: RoHS status] |
| 工作温度 | [DATA_NEEDED: temperature grade for LC package] | — |
| Device Type | — | Erasable Programmable Logic Device (EPLD) |
| Macrocell Count | — | 48 |
| Maximum Supply Voltage | — | 5.25 V |
| Terminal Pitch | — | 1.27 mm |
| Terminal Form | — | J-Bend |
| Package Shape | — | Square |
| Operating Temperature Grade | — | Commercial (0C to 70C) |
| Typical Operating Current | — | 20 mA at 1 MHz |
| Maximum Counter Frequency | — | 50 MHz (4 x 12-bit counters) |
| Speed Grade | — | -20 |
| Configuration Memory | — | Non-volatile EPROM (UV-erasable) |