EP1M120F484C6N vs EP1M120F484C5M Vergleich
Detaillierter Direktvergleich von EP1M120F484C6N von Intel und EP1M120F484C5M von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1M120F484C6N | EP1M120F484C5M |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $56,50 | $0,00 |
| Family | Mercury (APEX PLD platform) | — |
| Typical Gates | 120,000 | — |
| Logic Cells / Elements | 4,800 | — |
| Logic Array Blocks (LABs) | 480 | — |
| User I/Os | 303 | — |
| Gehäuse | 484-ball FC-FBGA (FineLine BGA) | 484-pin FC-FBGA |
| Core Supply Voltage (VCCINT) | 1.71 V to 1.89 V (1.8 V nominal) | — |
| Transceiver Data Rate | Up to 1.25 Gbps with CDR | — |
| Betriebstemperatur | 0C to 85C (commercial) | [DATA_NEEDED: operating temperature range] |
| Process Technology | CMOS | CMOS |
| Architecture | LUT-based, optimized for high-speed interconnect | Look-Up Table based |
| MultiCore Support | Yes (hot socketing) | — |
| Montageart | Surface Mount | Surface Mount |
| MSL-Level | 3 (per JEDEC J-STD-020) | — |
| RoHS-Status | Compliant | [DATA_NEEDED: RoHS status] |
| Device Type | — | Field Programmable Gate Array |
| Device Family | — | Mercury |
| Product Type | — | Programmable Logic Device |
| Versorgungsspannung | — | 1.8 V |
| Logic Capacity | — | 120K gates |
| Logic Cells | — | 4,800 cells |
| Logic Array Blocks | — | 480 LABs |
| User I/O Count | — | 303 I/O |
| Integrated Transceivers | — | High-speed transceivers |
| Clock Data Recovery | — | 1.25 Gbps |
| REACH Status | — | [DATA_NEEDED: REACH status] |
| AEC-Q100 Status | — | [DATA_NEEDED: AEC-Q100 qualification status] |