EP1M120F484C6N vs EP1M120F484C5M Comparaison
Comparaison détaillée côte à côte de EP1M120F484C6N par Intel et EP1M120F484C5M par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1M120F484C6N | EP1M120F484C5M |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $56,50 | $0,00 |
| Family | Mercury (APEX PLD platform) | — |
| Typical Gates | 120,000 | — |
| Logic Cells / Elements | 4,800 | — |
| Logic Array Blocks (LABs) | 480 | — |
| User I/Os | 303 | — |
| Boîtier | 484-ball FC-FBGA (FineLine BGA) | 484-pin FC-FBGA |
| Core Supply Voltage (VCCINT) | 1.71 V to 1.89 V (1.8 V nominal) | — |
| Transceiver Data Rate | Up to 1.25 Gbps with CDR | — |
| Température de fonctionnement | 0C to 85C (commercial) | [DATA_NEEDED: operating temperature range] |
| Process Technology | CMOS | CMOS |
| Architecture | LUT-based, optimized for high-speed interconnect | Look-Up Table based |
| MultiCore Support | Yes (hot socketing) | — |
| Type de montage | Surface Mount | Surface Mount |
| Niveau MSL | 3 (per JEDEC J-STD-020) | — |
| Statut RoHS | Compliant | [DATA_NEEDED: RoHS status] |
| Device Type | — | Field Programmable Gate Array |
| Device Family | — | Mercury |
| Product Type | — | Programmable Logic Device |
| Tension d'alimentation | — | 1.8 V |
| Logic Capacity | — | 120K gates |
| Logic Cells | — | 4,800 cells |
| Logic Array Blocks | — | 480 LABs |
| User I/O Count | — | 303 I/O |
| Integrated Transceivers | — | High-speed transceivers |
| Clock Data Recovery | — | 1.25 Gbps |
| REACH Status | — | [DATA_NEEDED: REACH status] |
| AEC-Q100 Status | — | [DATA_NEEDED: AEC-Q100 qualification status] |