EP1M120F484C6N vs EP1M120F484C5M Comparación
Comparación detallada lado a lado de EP1M120F484C6N por Intel y EP1M120F484C5M por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP1M120F484C6N | EP1M120F484C5M |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $56,50 | $0,00 |
| Family | Mercury (APEX PLD platform) | — |
| Typical Gates | 120,000 | — |
| Logic Cells / Elements | 4,800 | — |
| Logic Array Blocks (LABs) | 480 | — |
| User I/Os | 303 | — |
| Encapsulado | 484-ball FC-FBGA (FineLine BGA) | 484-pin FC-FBGA |
| Core Supply Voltage (VCCINT) | 1.71 V to 1.89 V (1.8 V nominal) | — |
| Transceiver Data Rate | Up to 1.25 Gbps with CDR | — |
| Temperatura de funcionamiento | 0C to 85C (commercial) | [DATA_NEEDED: operating temperature range] |
| Process Technology | CMOS | CMOS |
| Architecture | LUT-based, optimized for high-speed interconnect | Look-Up Table based |
| MultiCore Support | Yes (hot socketing) | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Nivel MSL | 3 (per JEDEC J-STD-020) | — |
| Estado RoHS | Compliant | [DATA_NEEDED: RoHS status] |
| Device Type | — | Field Programmable Gate Array |
| Device Family | — | Mercury |
| Product Type | — | Programmable Logic Device |
| Tensión de alimentación | — | 1.8 V |
| Logic Capacity | — | 120K gates |
| Logic Cells | — | 4,800 cells |
| Logic Array Blocks | — | 480 LABs |
| User I/O Count | — | 303 I/O |
| Integrated Transceivers | — | High-speed transceivers |
| Clock Data Recovery | — | 1.25 Gbps |
| REACH Status | — | [DATA_NEEDED: REACH status] |
| AEC-Q100 Status | — | [DATA_NEEDED: AEC-Q100 qualification status] |