EP1S20F672C7 vs EP1S20F484C7 Vergleich
Detaillierter Direktvergleich von EP1S20F672C7 von Intel und EP1S20F484C7 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP1S20F672C7 - Stratix FPGA 18,460 LEs 672-BGA | Intel
EP1S20F672C7 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP1S20F672C7 | EP1S20F484C7 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $195,00 | $195,00 |
| Series | Stratix | EP1S20 |
| Family | Altera Stratix FPGA | Stratix |
| Logic Elements (LEs) | 18,460 | — |
| Embedded Memory Bits | 1,669,248 | — |
| User I/O Pins | 426 | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| Gehäuse | 672-ball FineLine BGA (35 x 35 mm, 1.27 mm pitch) | 484-ball FC-FBGA |
| Logic Family | CMOS, SRAM-based | — |
| Core Supply Voltage | 1.5 V | — |
| Betriebstemperatur | 0C to 85C (commercial) | — |
| Speed Grade | C7 | C7 |
| Configuration Modes | JTAG, Passive Serial, Fast Passive Parallel, Active Serial | PS, PPS, PPA, JTAG |
| Montageart | Surface Mount | Surface Mount |
| MSL-Level | [DATA_NEEDED: MSL level] | — |
| RoHS-Status | unknown | [DATA_NEEDED: RoHS status] |
| Clock PLLs | Up to 10 | — |
| Process Technology | — | 130 nm CMOS |
| Core Voltage | — | 1.5 V |
| Logic Elements | — | 18,460 |
| Logic Array Blocks (LABs) | — | 1,846 |
| Total RAM Bits | — | 1,669,248 |
| Maximum I/O Pins | — | 361 |
| Package Size | — | 23 mm x 23 mm |
| Ball Pitch | — | 1.0 mm |
| Maximum Internal Frequency | — | 420.17 MHz |
| Betriebstemperaturbereich | — | 0 C to +85 C (Commercial) |
| Programming Voltage | — | 1.5 V (in-system via JTAG) |