EP1S20F672C7 vs EP1S20F484C7 Comparación
Comparación detallada lado a lado de EP1S20F672C7 por Intel y EP1S20F484C7 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP1S20F672C7 | EP1S20F484C7 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $195,00 | $195,00 |
| Series | Stratix | EP1S20 |
| Family | Altera Stratix FPGA | Stratix |
| Logic Elements (LEs) | 18,460 | — |
| Embedded Memory Bits | 1,669,248 | — |
| User I/O Pins | 426 | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| Encapsulado | 672-ball FineLine BGA (35 x 35 mm, 1.27 mm pitch) | 484-ball FC-FBGA |
| Logic Family | CMOS, SRAM-based | — |
| Core Supply Voltage | 1.5 V | — |
| Temperatura de funcionamiento | 0C to 85C (commercial) | — |
| Speed Grade | C7 | C7 |
| Configuration Modes | JTAG, Passive Serial, Fast Passive Parallel, Active Serial | PS, PPS, PPA, JTAG |
| Tipo de montaje | Surface Mount | Surface Mount |
| Nivel MSL | [DATA_NEEDED: MSL level] | — |
| Estado RoHS | unknown | [DATA_NEEDED: RoHS status] |
| Clock PLLs | Up to 10 | — |
| Process Technology | — | 130 nm CMOS |
| Core Voltage | — | 1.5 V |
| Logic Elements | — | 18,460 |
| Logic Array Blocks (LABs) | — | 1,846 |
| Total RAM Bits | — | 1,669,248 |
| Maximum I/O Pins | — | 361 |
| Package Size | — | 23 mm x 23 mm |
| Ball Pitch | — | 1.0 mm |
| Maximum Internal Frequency | — | 420.17 MHz |
| Rango de temperatura de funcionamiento | — | 0 C to +85 C (Commercial) |
| Programming Voltage | — | 1.5 V (in-system via JTAG) |