EP1S20F672C7 vs EP1S20F484C7 对比
详细并排对比 EP1S20F672C7 出自 Intel 和 EP1S20F484C7 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP1S20F672C7 | EP1S20F484C7 |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $195.00 | $195.00 |
| Series | Stratix | EP1S20 |
| Family | Altera Stratix FPGA | Stratix |
| Logic Elements (LEs) | 18,460 | — |
| Embedded Memory Bits | 1,669,248 | — |
| User I/O Pins | 426 | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| 封装 | 672-ball FineLine BGA (35 x 35 mm, 1.27 mm pitch) | 484-ball FC-FBGA |
| Logic Family | CMOS, SRAM-based | — |
| Core Supply Voltage | 1.5 V | — |
| 工作温度 | 0C to 85C (commercial) | — |
| Speed Grade | C7 | C7 |
| Configuration Modes | JTAG, Passive Serial, Fast Passive Parallel, Active Serial | PS, PPS, PPA, JTAG |
| 安装类型 | Surface Mount | Surface Mount |
| MSL 等级 | [DATA_NEEDED: MSL level] | — |
| RoHS 状态 | unknown | [DATA_NEEDED: RoHS status] |
| Clock PLLs | Up to 10 | — |
| Process Technology | — | 130 nm CMOS |
| Core Voltage | — | 1.5 V |
| Logic Elements | — | 18,460 |
| Logic Array Blocks (LABs) | — | 1,846 |
| Total RAM Bits | — | 1,669,248 |
| Maximum I/O Pins | — | 361 |
| Package Size | — | 23 mm x 23 mm |
| Ball Pitch | — | 1.0 mm |
| Maximum Internal Frequency | — | 420.17 MHz |
| 工作温度范围 | — | 0 C to +85 C (Commercial) |
| Programming Voltage | — | 1.5 V (in-system via JTAG) |