EP1S25F672C5N vs EP1S25F672C8 Vergleich
Detaillierter Direktvergleich von EP1S25F672C5N von Intel und EP1S25F672C8 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1S25F672C5N | EP1S25F672C8 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $142,00 | $525,00 |
| Family | Stratix | Stratix |
| Series | EP1S25 | — |
| Logic Elements (Cells) | 25,660 | — |
| Number of CLBs | 2,566 | — |
| Number of Logic Cells / Gates | [DATA_NEEDED: total system gates] | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Maximum Internal Frequency | 500 MHz | — |
| Core Supply Voltage | 1.5 V (nominal) | 1.5 V |
| Number of I/O Pins | 473 user I/O | — |
| Number of I/O Banks | [DATA_NEEDED: I/O bank count] | — |
| Package Type | FineLine BGA (FBGA) | — |
| Package Pin Count | 672 | — |
| Ball Pitch | 1.00 mm | — |
| Betriebstemperaturbereich | 0 °C to +85 °C (commercial) | — |
| Speed Grade | C5 | C8 (commercial, -8) |
| Lead-Free (Pb-Free) | Yes (suffix "N") | — |
| Configuration Method | SRAM-based, programmable via JTAG / Passive Serial / Fast Passive Parallel | JTAG / Altera configuration device |
| Montageart | Surface Mount (BGA) | Surface Mount |
| RoHS-Status | Compliant | [DATA_NEEDED: RoHS Status] |
| Logic Elements | — | 25,660 |
| Logic Array Blocks (LABs) | — | 2,566 |
| User I/Os | — | 473 |
| Maximum Operating Frequency | — | 357.14 MHz |
| Gehäuse | — | 672-ball FineLine BGA (FBGA) |
| Package Dimensions | — | 35 x 35 mm, 1.27 mm pitch |
| Betriebstemperatur | — | 0 C to +85 C (commercial) |
| MSL-Level | — | [DATA_NEEDED: MSL Level] |
| Logic Family | — | CMOS |