EP1S30F1020C6 vs EP1S80F1020C6 Vergleich

Detaillierter Direktvergleich von EP1S30F1020C6 von Altera und EP1S80F1020C6 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP1S30F1020C6 EP1S80F1020C6
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $262,00 $1.180,00
Family Stratix —
Core Voltage 1.5 V —
Process Technology 0.13 micrometer SRAM, all-layer copper 130 nm CMOS
Logic Elements 32470 79,040
Total RAM Bits 3317184 7,427,520
DSP Blocks 28 —
Embedded Multipliers Yes, 9-bit x 9-bit elements —
User I/O Pins 726 —
Gehäuse 1020-ball FCBGA (BBGA) —
Montageart Surface Mount Surface Mount
Speed Grade 6 C6
Temperature Grade Commercial (C) —
Configuration Method SRAM-based, JTAG boundary-scan —
Betriebstemperatur 0C to +85C (commercial) —
MSL-Level [DATA_NEEDED: MSL Level] —
RoHS-Status [DATA_NEEDED: RoHS Status] [DATA_NEEDED: rohs status]
Series — Stratix
Number of Logic Blocks / LABs — 9,191
Number of I/O Pins (max) — 773 user I/O
Number of Pins / Balls — 1020
Package Type — FC-FBGA (flip-chip fine-pitch BGA), 33 x 33 mm, 1.0 mm pitch
Core Supply Voltage (VCCINT) — 1.5 V nominal (1.425 V to 1.575 V)
Operating Temperature (Commercial) — 0 C to +85 C
Maximum Internal Clock Frequency — 450.05 MHz
Family Description — FPGA - Field Programmable Gate Array
Embedded Memory — TriMatrix (three block sizes, true/simple dual-port)
Configuration Interface — JTAG (IEEE 1149.1) + serial/parallel configuration device
Design Tool — Quartus II (legacy, Stratix family)
Feuchtigkeitsempfindlichkeitsgrad (MSL) — [DATA_NEEDED: MSL rating]

Datenblätter & Ressourcen

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