EP1S60B956C6 vs EP1S30B956C6 Vergleich

Detaillierter Direktvergleich von EP1S60B956C6 von Altera und EP1S30B956C6 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP1S60B956C6 EP1S30B956C6
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $339,20 $78,00
Series Stratix (EP1S) —
Logic Elements 57,120 —
Total RAM Bits 5,215,104 —
Number of LABs/CLBs 5712 —
Number of I/O 683 —
Gehäuse 956-BBGA, FCBGA (40 x 40 mm) 956-ball FCBGA (BGA-956), 40 x 40 mm, 1.27 mm pitch
Supplier Device Package 956-BGA (40x40) —
Montageart Surface Mount (BGA) Surface Mount
Betriebstemperatur 0 C to +85 C (Commercial) 0 C to 85 C (Commercial)
Core Voltage - Supply 1.425 V to 1.575 V —
Voltage - Supply 1.425 V to 1.575 V —
Anzahl der Pins 956 —
Form of Terminal Ball (BGA) —
Package Code BGA / FCBGA —
RoHS-Status [DATA_NEEDED: RoHS status] Not confirmed - pre-RoHS part
Family — Stratix
Logic Elements (LEs) — 32,470
Logic Array Blocks (LABs) — 3,247
Embedded Memory Bits — 3,317,184 (approximately 3.4 Mbit)
Maximum User I/O — 683
Process Technology — 130 nm CMOS
Core Voltage (VCCINT) — 1.5 V
Speed Grade — C6
Maximum Internal Frequency — 450.05 MHz (per family datasheet)
DSP Blocks — Yes (Stratix DSP blocks)
PLLs — Up to 12
Configuration Modes — Passive Serial (PS), Passive Parallel (PP), JTAG
MSL-Level — [DATA_NEEDED: MSL level]
Lead-Free — Unknown

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