EP1S80B956C6AB vs EP1S80B956C5N Vergleich
Detaillierter Direktvergleich von EP1S80B956C6AB von Intel und EP1S80B956C5N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1S80B956C6AB | EP1S80B956C5N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $142,00 | $175,00 |
| Family | Stratix | Altera Stratix |
| Logic Elements (LEs) | 79,040 | — |
| Logic Cells | 79,040 | — |
| Process Technology | 130 nm | 130 nm CMOS |
| Core Voltage | 1.5 V | — |
| Maximum Operating Frequency | 450.05 MHz | — |
| User I/O Pins | 683 | — |
| Gehäuse | 956-ball FCBGA | 956-ball FCBGA |
| Montageart | Surface Mount | Surface Mount (BGA) |
| RoHS-Status | Compliant | [DATA_NEEDED: RoHS status] |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | 0 °C to +85 °C (commercial, 'C' grade) |
| Memory Blocks | TriMatrix embedded RAM | — |
| DSP Blocks | Embedded DSP blocks (per Stratix family) | Yes (dedicated hardware multipliers) |
| PLLs | Multiple PLLs for clock management | Yes (multiple) |
| Configuration Method | SRAM-based, configured via JTAG or passive/active serial | — |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements | — | 79,040 |
| Maximum Internal Clock Frequency | — | 500 MHz |
| Core Supply Voltage | — | 1.5 V |
| Speed Grade | — | 5 |
| Memory Architecture | — | TriMatrix on-chip memory |
| I/O Standard Support | — | LVDS, LVTTL, LVCMOS, SSTL, HSTL (per Stratix family) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |