EP1SGX25DF67216 vs EP1SGX25DF672C6 Vergleich

Detaillierter Direktvergleich von EP1SGX25DF67216 von Altera und EP1SGX25DF672C6 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP1SGX25DF67216 EP1SGX25DF672C6
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $198,00 $96,50
Family Stratix GX —
Logic Elements 25,660 25,660 LE
Total RAM Bits 1,944,576 1,944,576 bits
Embedded Multipliers (18x18) [DATA_NEEDED: 18x18 multiplier count] —
Number of PLLs 4 —
Number of Transceiver Channels 8 (4 in each of 2 banks) —
Max Transceiver Data Rate 3.1875 Gbps per channel 3.125 Gbps
Min Transceiver Data Rate 500 Mbps —
Core Supply Voltage 1.5 V —
Auxiliary Supply Voltage 3.3 V —
I/O Supply Voltage 1.5 V / 1.8 V / 2.5 V / 3.3 V (per bank) —
Maximum User I/O Pins [DATA_NEEDED: user I/O count for DF672 package] —
Gehäuse 672-ball FineLine BGA (DF672) 672-BBGA FineLine BGA
Montageart Surface Mount (BGA) Surface Mount
Betriebstemperatur Industrial, -40C to +100C (I-suffix family) 0C to +85C (commercial)
On-Die Termination Yes, 100-ohm differential —
Pre-emphasis / Equalization Programmable (transmitter pre-emphasis; receiver adaptive equalization) —
Configuration Schemes Passive serial, fast passive parallel, JTAG, Altera enhanced configuration —
RoHS-Status Lead-free / RoHS compliant (per Altera product family documentation) —
Series — Stratix GX
Number of LABs — 2,566
User I/O Count — 455
Number of Transceivers — 6 channels (per Stratix GX family)
Core Voltage — 1.5 V
Package Dimensions — 33 x 33 mm
Ball Pitch — 1.0 mm
Lead-Free / RoHS — Lead-Free (per FBGA suffix family)
Process Technology — CMOS

Datenblätter & Ressourcen

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