EP1SGX40DF1020I6N vs EP1SGX25DF1020I6N Vergleich

Detaillierter Direktvergleich von EP1SGX40DF1020I6N von Intel und EP1SGX25DF1020I6N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP1SGX40DF1020I6N EP1SGX25DF1020I6N
Marke Intel Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Aktiv Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $1.450,00 $165,00
Series Stratix GX EP1SGX25
Family Stratix (First Generation) Stratix GX
Manufacturer Intel (formerly Altera) Intel (formerly Altera)
Core Supply Voltage 1.425 V to 1.575 V (1.5 V nominal) 1.425 V to 1.575 V (1.5 V nominal)
Number of Logic Elements (LEs) 41,250 —
Number of LABs (Logic Array Blocks) 4,125 —
Total RAM Bits 3,423,744 —
Maximum User I/O Pins 624 —
Number of I/O Banks [DATA_NEEDED: I/O bank count] —
High-Speed Transceivers Integrated GX SerDes (channels, data rate: [DATA_NEEDED: per Stratix GX handbook]) —
Embedded DSP Blocks Yes (DSP block count: [DATA_NEEDED: per device datasheet]) —
Gehäuse / Bauform 1020-BBGA / 1020-FBGA —
Package Size 33 x 33 mm, 1.0 mm pitch —
Supplier Device Package 1020-FBGA (33 x 33) —
Betriebstemperatur 0 C to 85 C (industrial grade 'I') 0 °C to +85 °C (industrial)
Speed Grade 6 (I6) —
Montageart Surface Mount (BGA) Surface Mount (BGA)
MSL-Level [DATA_NEEDED: MSL rating] [DATA_NEEDED: moisture sensitivity level]
RoHS-Status [DATA_NEEDED: confirm RoHS on datasheet] Compliant
Logic Family CMOS (SRAM-based configuration) —
Packaging Tray / Bulk —
Configuration Mode Passive Serial / Fast Passive Parallel / JTAG (per Stratix GX handbook) —
Logic Elements — 25,660
Configurable Logic Blocks (CLBs) — 2,566
User I/Os — 607
Maximum Operating Frequency — [DATA_NEEDED: max internal clock frequency in MHz]
Process Technology — 130 nm CMOS
Multi-Gigabit Transceivers — Integrated (up to 3.125 Gbps per channel)
Gehäuse — 1020-ball FC-FBGA, 33 mm × 33 mm, 1.0 mm pitch
Lead Finish — Lead Free
Memory — Embedded TriMatrix memory blocks
DSP Blocks — Integrated DSP blocks for fixed/floating-point arithmetic
Clock Management — PLLs with dynamic phase alignment (DPA)
Grade Identifier — I6 (industrial, speed grade 6)

Datenblätter & Ressourcen

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