EP20K100EFC324-1N vs EP20K30EFC324-1 Vergleich

Detaillierter Direktvergleich von EP20K100EFC324-1N von Altera und EP20K30EFC324-1 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP20K100EFC324-1N EP20K30EFC324-1
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $108,00 $99,50
Family APEX-20KE APEX-20KE (1.8V, LVDS)
Device Type FPGA (Field Programmable Gate Array) —
Logic Elements (LEs) 4160 —
Typical Gates 100,000 [DATA_NEEDED: typical gate count]
Maximum User I/O 246 128
Embedded System Blocks (ESBs) 53248 bits —
Gehäuse 324-BGA (FineLine BGA) 324-FBGA (FineLine BGA, 19x19 mm)
Betriebstemperatur 0 C to 85 C 0C to +85C (commercial grade per Altera family spec)
Propagation Delay 1.6 ns —
Internal Operating Frequency 250 MHz —
Core Voltage 1.8 V —
I/O Standard Support LVDS, SSTL, HSTL, LVTTL, LVCMOS —
Process Technology 0.15 µm all-layer copper CMOS SRAM-based, 0.18 um
JTAG Support IEEE 1149.1 boundary-scan —
Programming Technology SRAM-based (volatile, requires configuration device) —
MultiVolt I/O 1.8 V core with 3.3 V / 5.0 V I/O support —
Manufacturer — Altera (now Intel)
Series — APEX-20K
Logic Elements (typical) — 30,000 (30KLE)
Total RAM Bits — 24576
Core Supply Voltage (VCCINT) — 1.71 V to 1.89 V
I/O Supply Voltage — [DATA_NEEDED: VCCIO range]
Montageart — Surface Mount
Pin-Anzahl — 324
Temperature Grade — Commercial (per Altera family specification)
Configuration — Passive serial / passive parallel / JTAG
Lead-Free / RoHS — [DATA_NEEDED: RoHS compliance]
Speed Grade — -1
MSL-Level — [DATA_NEEDED: MSL moisture sensitivity level]
PLLs — Up to 4 (per APEX-20KE family)

Datenblätter & Ressourcen

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