EP20K200FC484-3AA vs EP20K200FC484-2X Vergleich
Detaillierter Direktvergleich von EP20K200FC484-3AA von Intel und EP20K200FC484-2X von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP20K200FC484-2X - 200K Gates APEX 20K FPGA, 484-FBGA | Intel / Altera
EP20K200FC484-2X ObsoleteSpezifikationsvergleich
| Parameter | EP20K200FC484-3AA | EP20K200FC484-2X |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $171,00 | $95,00 |
| Family | APEX-20K | APEX 20K |
| Logic Elements | 8320 | — |
| Number of LABs/CLBs | 832 | — |
| Total RAM Bits | 106496 | — |
| Number of I/O Pins | 382 | — |
| Maximum Gates | 526000 | — |
| Versorgungsspannung | 2.375 V to 2.625 V | — |
| Speed Grade | -3 | -2 (with LVDS support, "X" suffix) |
| Package Type | 484-BBGA (FineLine BGA) | — |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | 0 °C to 85 °C (commercial) |
| Betriebs-Sperrschichttemperatur | [DATA_NEEDED: junction temperature range] | — |
| Configuration Interface | JTAG (IEEE 1149.1) / Serial | — |
| Process Technology | CMOS | 0.22 µm CMOS |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Lead Free | [DATA_NEEDED: lead-free status] | — |
| Series | — | EP20K200 |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Maximum Logic Elements | — | 8,320 cells |
| Typical System Gates | — | 200,000 |
| Embedded Memory (EAB) | — | 106,496 bits |
| Maximum User I/O | — | 382 |
| Number of Logic Elements | — | 8,320 |
| Propagation Delay | — | 3.0 ns |
| Maximum Internal Frequency | — | 200 MHz |
| Core Supply Voltage | — | 2.5 V |
| Gehäuse | — | 484-pin FBGA (FineLine BGA), 1.0 mm pitch |
| Programmable I/O Standards | — | 1.8 V, 2.5 V, 3.3 V, LVTTL, LVCMOS, LVDS |
| JTAG Support | — | IEEE 1149.1 Boundary-Scan |