EP20K200FC484-3AA vs EP20K200FC484-2X 对比

详细并排对比 EP20K200FC484-3AA 出自 Intel 和 EP20K200FC484-2X 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K200FC484-3AA EP20K200FC484-2X
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $171.00 $95.00
Family APEX-20K APEX 20K
Logic Elements 8320 —
Number of LABs/CLBs 832 —
Total RAM Bits 106496 —
Number of I/O Pins 382 —
Maximum Gates 526000 —
电源电压 2.375 V to 2.625 V —
Speed Grade -3 -2 (with LVDS support, "X" suffix)
Package Type 484-BBGA (FineLine BGA) —
安装类型 Surface Mount Surface Mount
工作温度 [DATA_NEEDED: operating temperature range] 0 °C to 85 °C (commercial)
工作结温 [DATA_NEEDED: junction temperature range] —
Configuration Interface JTAG (IEEE 1149.1) / Serial —
Process Technology CMOS 0.22 µm CMOS
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance status]
Lead Free [DATA_NEEDED: lead-free status] —
Series — EP20K200
Device Type — FPGA (Field Programmable Gate Array)
Maximum Logic Elements — 8,320 cells
Typical System Gates — 200,000
Embedded Memory (EAB) — 106,496 bits
Maximum User I/O — 382
Number of Logic Elements — 8,320
Propagation Delay — 3.0 ns
Maximum Internal Frequency — 200 MHz
Core Supply Voltage — 2.5 V
封装 — 484-pin FBGA (FineLine BGA), 1.0 mm pitch
Programmable I/O Standards — 1.8 V, 2.5 V, 3.3 V, LVTTL, LVCMOS, LVDS
JTAG Support — IEEE 1149.1 Boundary-Scan

数据手册与资源

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