EP20K400CB652C9N vs EP20K400CB652C9ES Vergleich

Detaillierter Direktvergleich von EP20K400CB652C9N von Intel und EP20K400CB652C9ES von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP20K400CB652C9N EP20K400CB652C9ES
Marke Intel Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus NRND NRND
Lagerstatus In Stock In Stock
Stückpreis (USD) $195,00 $195,00
Family APEX 20KC APEX 20KC
Series EP20K400 APEX 20KC
Device Type Programmable Logic Device (SOPC FPGA) —
Architecture MultiCore (LUT logic + Embedded System Blocks) —
System Gates 400,000 —
Logic Elements 16,640 —
Maximum User I/Os 502 —
Total Memory Bits 212,992 (per chip) —
Maximum Internal Frequency 250 MHz —
Propagation Delay 2.0 ns —
Logic Family CMOS —
Core Process Technology 0.15 µm all-layer copper CMOS —
Core Supply Voltage (VCCINT) 1.8 V —
I/O Supply Voltage (VCCIO) 2.5 V —
Betriebstemperaturbereich 0 °C to +85 °C (Commercial) 0°C to +85°C (Commercial)
Gehäuse BGA-652 (Plastic Ball Grid Array, 652 balls) —
Montageart Surface Mount Surface Mount
Configuration Interface IEEE 1149.1 JTAG, serial passive parallel async —
RoHS-Status Unknown (legacy Altera part - verify with distributor) [DATA_NEEDED: RoHS status]
Logic Elements / Cells — 16640
Total System Gates — 400000
Embedded Memory (Bits) — 212992
Number of User I/O — 488
Number of LABs/CLBs — [DATA_NEEDED: LAB count]
Number of Logic Array Blocks — 1040
Maximum Operating Frequency — 250 MHz
Core Voltage — 1.8 V
Process Technology — 0.15 µm CMOS
Gehäuse / Bauform — 652-BGA
MSL-Level — 3 (168 Hours)
Packaging — Tray
Programmability Type — In-system programmable (SRAM-based)
I/O Standards Supported — LVTTL, LVCMOS, PCI, LVDS, HSTL, SSTL
JTAG (IEEE 1149.1) — Yes
PLL — Yes (4-phase)

Datenblätter & Ressourcen

Alle Produkte durchsuchen BOM erstellen Angebot anfordern