EP20K400CB652C9N vs EP20K400CB652C9ES 对比

详细并排对比 EP20K400CB652C9N 出自 Intel 和 EP20K400CB652C9ES 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K400CB652C9N EP20K400CB652C9ES
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 不推荐新设计
库存状态 有库存 有库存
单价(USD) $195.00 $195.00
Family APEX 20KC APEX 20KC
Series EP20K400 APEX 20KC
Device Type Programmable Logic Device (SOPC FPGA) —
Architecture MultiCore (LUT logic + Embedded System Blocks) —
System Gates 400,000 —
Logic Elements 16,640 —
Maximum User I/Os 502 —
Total Memory Bits 212,992 (per chip) —
Maximum Internal Frequency 250 MHz —
Propagation Delay 2.0 ns —
Logic Family CMOS —
Core Process Technology 0.15 µm all-layer copper CMOS —
Core Supply Voltage (VCCINT) 1.8 V —
I/O Supply Voltage (VCCIO) 2.5 V —
工作温度范围 0 °C to +85 °C (Commercial) 0°C to +85°C (Commercial)
封装 BGA-652 (Plastic Ball Grid Array, 652 balls) —
安装类型 Surface Mount Surface Mount
Configuration Interface IEEE 1149.1 JTAG, serial passive parallel async —
RoHS 状态 Unknown (legacy Altera part - verify with distributor) [DATA_NEEDED: RoHS status]
Logic Elements / Cells — 16640
Total System Gates — 400000
Embedded Memory (Bits) — 212992
Number of User I/O — 488
Number of LABs/CLBs — [DATA_NEEDED: LAB count]
Number of Logic Array Blocks — 1040
Maximum Operating Frequency — 250 MHz
Core Voltage — 1.8 V
Process Technology — 0.15 µm CMOS
封装 / 外壳 — 652-BGA
MSL 等级 — 3 (168 Hours)
Packaging — Tray
Programmability Type — In-system programmable (SRAM-based)
I/O Standards Supported — LVTTL, LVCMOS, PCI, LVDS, HSTL, SSTL
JTAG (IEEE 1149.1) — Yes
PLL — Yes (4-phase)

数据手册与资源

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