EP20K400CB652C9N vs EP20K400CB652C9ES Comparaison
Comparaison détaillée côte à côte de EP20K400CB652C9N par Intel et EP20K400CB652C9ES par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K400CB652C9N | EP20K400CB652C9ES |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $195,00 | $195,00 |
| Family | APEX 20KC | APEX 20KC |
| Series | EP20K400 | APEX 20KC |
| Device Type | Programmable Logic Device (SOPC FPGA) | — |
| Architecture | MultiCore (LUT logic + Embedded System Blocks) | — |
| System Gates | 400,000 | — |
| Logic Elements | 16,640 | — |
| Maximum User I/Os | 502 | — |
| Total Memory Bits | 212,992 (per chip) | — |
| Maximum Internal Frequency | 250 MHz | — |
| Propagation Delay | 2.0 ns | — |
| Logic Family | CMOS | — |
| Core Process Technology | 0.15 µm all-layer copper CMOS | — |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | 2.5 V | — |
| Plage de température de fonctionnement | 0 °C to +85 °C (Commercial) | 0°C to +85°C (Commercial) |
| Boîtier | BGA-652 (Plastic Ball Grid Array, 652 balls) | — |
| Type de montage | Surface Mount | Surface Mount |
| Configuration Interface | IEEE 1149.1 JTAG, serial passive parallel async | — |
| Statut RoHS | Unknown (legacy Altera part - verify with distributor) | [DATA_NEEDED: RoHS status] |
| Logic Elements / Cells | — | 16640 |
| Total System Gates | — | 400000 |
| Embedded Memory (Bits) | — | 212992 |
| Number of User I/O | — | 488 |
| Number of LABs/CLBs | — | [DATA_NEEDED: LAB count] |
| Number of Logic Array Blocks | — | 1040 |
| Maximum Operating Frequency | — | 250 MHz |
| Core Voltage | — | 1.8 V |
| Process Technology | — | 0.15 µm CMOS |
| Boîtier / Format | — | 652-BGA |
| Niveau MSL | — | 3 (168 Hours) |
| Packaging | — | Tray |
| Programmability Type | — | In-system programmable (SRAM-based) |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, LVDS, HSTL, SSTL |
| JTAG (IEEE 1149.1) | — | Yes |
| PLL | — | Yes (4-phase) |