EP20K600CF33C9 vs EP20K600CF33C8N Vergleich
Detaillierter Direktvergleich von EP20K600CF33C9 von Intel und EP20K600CF33C8N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K600CF33C9 | EP20K600CF33C8N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $171,00 | $162,75 |
| Family | APEX 20KC | APEX 20KC |
| Process Technology | 0.15 µm CMOS | — |
| System Gates | 600,000 (maximum) | — |
| Logic Elements / Cells | 24,320 | 24,320 |
| Maximum Operating Frequency | 250 MHz | — |
| Maximale Taktfrequenz | 303.03 MHz | — |
| Propagation Delay | 2.0 ns | — |
| Core Supply Voltage (VCCINT) | 1.8 V nominal (1.71 V to 1.89 V) | — |
| User I/O | 588 (4 dedicated inputs + 580 general-purpose I/O) | — |
| Gehäuse | 1020-ball FC-FBGA | 1020-pin FC-FBGA (flip-chip) |
| Montageart | Surface Mount (BGA) | Surface Mount |
| Betriebstemperaturbereich | [DATA_NEEDED: operating temperature range] | — |
| Embedded RAM | Dual-port RAM blocks (per family) | — |
| Programmability | JTAG / IEEE 1149.1 ISP, SRAM-based | — |
| RoHS-Status | [DATA_NEEDED: rohs status] | Compliant (N suffix) |
| MSL-Level | [DATA_NEEDED: MSL level] | — |
| Logic Block Architecture | MultiCore (LUT + product-term + embedded memory) | — |
| I/O Standards Supported | LVTTL, LVCMOS, LVDS (per family datasheet) | — |
| Total RAM Bits | — | 311,296 |
| Number of LABs / CLBs | — | 2,432 |
| Number of Gates | — | 1,537,000 (max) |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Core Voltage Supply | — | 1.71 V to 1.89 V (1.8 V nominal) |
| Technology / Process | — | 0.15 µm CMOS |
| Maximum Internal Frequency | — | 301.21 MHz |
| Speed Grade | — | -8 (slower than -7) |
| Betriebstemperatur | — | 0°C to 85°C (TJ) |
| Pitch | — | 0.33 mm |
| Programmable Type | — | In-System / SRAM-based |
| Configuration Interface | — | JTAG (IEEE 1149.1) + Passive Serial / Parallel |