EP20K600CF33C9 vs EP20K600CF33C8N 比較
詳細な並列比較: EP20K600CF33C9 メーカー: Intel および EP20K600CF33C8N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP20K600CF33C9 | EP20K600CF33C8N |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $171.00 | $162.75 |
| Family | APEX 20KC | APEX 20KC |
| Process Technology | 0.15 µm CMOS | — |
| System Gates | 600,000 (maximum) | — |
| Logic Elements / Cells | 24,320 | 24,320 |
| Maximum Operating Frequency | 250 MHz | — |
| 最大クロック周波数 | 303.03 MHz | — |
| Propagation Delay | 2.0 ns | — |
| Core Supply Voltage (VCCINT) | 1.8 V nominal (1.71 V to 1.89 V) | — |
| User I/O | 588 (4 dedicated inputs + 580 general-purpose I/O) | — |
| パッケージ | 1020-ball FC-FBGA | 1020-pin FC-FBGA (flip-chip) |
| 実装タイプ | Surface Mount (BGA) | Surface Mount |
| 動作温度範囲 | [DATA_NEEDED: operating temperature range] | — |
| Embedded RAM | Dual-port RAM blocks (per family) | — |
| Programmability | JTAG / IEEE 1149.1 ISP, SRAM-based | — |
| RoHS ステータス | [DATA_NEEDED: rohs status] | Compliant (N suffix) |
| MSLレベル | [DATA_NEEDED: MSL level] | — |
| Logic Block Architecture | MultiCore (LUT + product-term + embedded memory) | — |
| I/O Standards Supported | LVTTL, LVCMOS, LVDS (per family datasheet) | — |
| Total RAM Bits | — | 311,296 |
| Number of LABs / CLBs | — | 2,432 |
| Number of Gates | — | 1,537,000 (max) |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Core Voltage Supply | — | 1.71 V to 1.89 V (1.8 V nominal) |
| Technology / Process | — | 0.15 µm CMOS |
| Maximum Internal Frequency | — | 301.21 MHz |
| Speed Grade | — | -8 (slower than -7) |
| 動作温度 | — | 0°C to 85°C (TJ) |
| Pitch | — | 0.33 mm |
| Programmable Type | — | In-System / SRAM-based |
| Configuration Interface | — | JTAG (IEEE 1149.1) + Passive Serial / Parallel |