EP20K600CF672C8N vs EP20K600CF672I8 Vergleich

Detaillierter Direktvergleich von EP20K600CF672C8N von Intel und EP20K600CF672I8 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP20K600CF672C8N EP20K600CF672I8
Marke Intel Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Aktiv Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $108,00 $195,00
Device Type SPLD SPLD / FPGA
Product Type FPGA / programmable logic device —
Family APEX 20KC APEX 20KC
Nominal Gate Capacity 600K gates —
Logic Elements or Cells 24,320 —
Macros 2,432 —
User I/O Count 508 —
Package Terminals 652 pins —
Gehäuse BGA-652, 45 x 45 mm, 1.27 mm pitch —
Package Description 672-pin FC-FBGA —
Versorgungsspannung 1.8 V —
Listed Frequency 301.21 MHz —
Propagation Delay 1.48 ns —
Fabrication Process 0.15 µm —
Betriebstemperatur 0°C to 85°C 0 °C to +85 °C (Industrial)
Interconnect Metal All-layer copper metal —
I/O Configuration 508 user I/O —
Montageart Surface mount Surface Mount
RoHS-Status unknown Compliant per legacy product records
REACH Status unknown —
AEC-Q100 Qualification unknown —
Configuration Method [DATA_NEEDED: configuration memory and programming method] —
Core Current [DATA_NEEDED: core supply current] —
I/O Bank Voltage [DATA_NEEDED: supported I/O voltage range] —
Junction Temperature [DATA_NEEDED: maximum junction temperature] —
Wärmewiderstand [DATA_NEEDED: junction-to-ambient thermal resistance] —
Logic Elements / Cells — 24,320
Macros (Logic Cells) — 2432
Typical Gate Count — 600,000 gates
Embedded Memory — 311,296 bits
User I/Os — 488 to 508
Anzahl der Pins — 652 (functional) / 672 (BGA balls)
Propagation Delay (typical) — 1.48 ns
Internal Frequency (max) — [DATA_NEEDED: max internal frequency in MHz]
Core Supply Voltage — 1.8 V
Process Technology — 0.15 µm all-layer copper
Package Type — 672-ball BGA, 45 x 45 mm, 1.27 mm pitch
Configuration Interface — JTAG / Passive Serial
Design Tool — Quartus II (legacy MAX+PLUS II)

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