EP20K600CF672C9N vs EP20K600CF672C8N Vergleich
Detaillierter Direktvergleich von EP20K600CF672C9N von Intel und EP20K600CF672C8N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K600CF672C9N | EP20K600CF672C8N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $175,00 | $108,00 |
| Family | APEX 20KC | APEX 20KC |
| Device Type | Loadable PLD / SRAM FPGA | SPLD |
| System Gates | 600,000 | — |
| Logic Elements | 24,320 | — |
| Maximum Operating Frequency | 250 MHz | — |
| Propagation Delay | 1.48 ns (per logic element) | 1.48 ns |
| Core Supply Voltage | 1.71 V to 1.89 V (1.8 V nominal) | — |
| User I/Os | 488 | — |
| Total Terminals | 672 | — |
| Package Type | FineLine BGA (FC-FBGA), 1.00 mm pitch, 45 x 45 mm | — |
| Process Technology | 0.15 µm all-layer copper | — |
| Betriebstemperatur | 0 C to 85 C (commercial) | 0°C to 85°C |
| Montageart | Surface Mount | Surface mount |
| Configuration Interface | JTAG (IEEE 1149.1), passive serial, active serial | — |
| Embedded Memory | MultiCore EABs supporting up to 311,000 RAM bits | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | unknown |
| Product Type | — | FPGA / programmable logic device |
| Nominal Gate Capacity | — | 600K gates |
| Logic Elements or Cells | — | 24,320 |
| Macros | — | 2,432 |
| User I/O Count | — | 508 |
| Package Terminals | — | 652 pins |
| Gehäuse | — | BGA-652, 45 x 45 mm, 1.27 mm pitch |
| Package Description | — | 672-pin FC-FBGA |
| Versorgungsspannung | — | 1.8 V |
| Listed Frequency | — | 301.21 MHz |
| Fabrication Process | — | 0.15 µm |
| Interconnect Metal | — | All-layer copper metal |
| I/O Configuration | — | 508 user I/O |
| REACH Status | — | unknown |
| AEC-Q100 Qualification | — | unknown |
| Configuration Method | — | [DATA_NEEDED: configuration memory and programming method] |
| Core Current | — | [DATA_NEEDED: core supply current] |
| I/O Bank Voltage | — | [DATA_NEEDED: supported I/O voltage range] |
| Junction Temperature | — | [DATA_NEEDED: maximum junction temperature] |
| Wärmewiderstand | — | [DATA_NEEDED: junction-to-ambient thermal resistance] |