EP2A15B724C vs EP2A15B724C7 Vergleich

Detaillierter Direktvergleich von EP2A15B724C von Altera und EP2A15B724C7 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP2A15B724C EP2A15B724C7
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $195,00 $125,00
Family APEX II APEX II
Logic Elements (LEs) 16,640 —
Maximum User I/O Pins 492 —
Embedded RAM 425,984 bits —
Gehäuse 724-Ball FCBGA (FineLine BGA) 724-BBGA, FCBGA (35 mm x 35 mm)
Process Technology 0.18 micron CMOS 0.15 um all-layer copper
Maximum System Gates Up to 1.5M gates (family-level) —
Embedded System Blocks (ESBs) Configurable as dual-port RAM / ROM / FIFO —
Interconnect MultiTrack, deterministic —
I/O Standards LVTTL, LVCMOS, LVDS, PCI, GTL+ (family-level) —
PLLs Yes (family-level, up to 4 per device) —
Betriebstemperatur [DATA_NEEDED: operating temperature grade] 0 C to 85 C (TJ)
Montageart Surface Mount (BGA) Surface Mount (BGA)
MSL-Level [DATA_NEEDED: MSL rating] —
RoHS-Status [DATA_NEEDED: RoHS compliance] unknown
Speed Grade C (per suffix; specific speed bin [DATA_NEEDED]) C7 (per part suffix)
JTAG / Configuration IEEE 1149.1 JTAG; passive serial / PS configuration supported (family-level) —
Manufacturer — Altera (acquired by Intel)
System Gates — 600,000
Logic Elements / Cells — 16,640
Total RAM Bits — 425,984
Number of I/O — 492
Core Voltage — 1.425 V to 1.575 V
Maximum Internal Frequency — 500 MHz
LVDS Support — True-LVDS up to 1 Gbps
Interface Standards — True-LVDS, LVPECL, PCML, HyperTransport
Configuration Modes — Passive Serial, Passive Parallel, JTAG

Datenblätter & Ressourcen

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