EP2A15B724C vs EP2A15B724C7 Comparison

Detailed side-by-side comparison of EP2A15B724C by Altera and EP2A15B724C7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP2A15B724C EP2A15B724C7
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $195.00 $125.00
Family APEX II APEX II
Logic Elements (LEs) 16,640 β€”
Maximum User I/O Pins 492 β€”
Embedded RAM 425,984 bits β€”
Package 724-Ball FCBGA (FineLine BGA) 724-BBGA, FCBGA (35 mm x 35 mm)
Process Technology 0.18 micron CMOS 0.15 um all-layer copper
Maximum System Gates Up to 1.5M gates (family-level) β€”
Embedded System Blocks (ESBs) Configurable as dual-port RAM / ROM / FIFO β€”
Interconnect MultiTrack, deterministic β€”
I/O Standards LVTTL, LVCMOS, LVDS, PCI, GTL+ (family-level) β€”
PLLs Yes (family-level, up to 4 per device) β€”
Operating Temperature [DATA_NEEDED: operating temperature grade] 0 C to 85 C (TJ)
Mounting Type Surface Mount (BGA) Surface Mount (BGA)
MSL Level [DATA_NEEDED: MSL rating] β€”
RoHS Status [DATA_NEEDED: RoHS compliance] unknown
Speed Grade C (per suffix; specific speed bin [DATA_NEEDED]) C7 (per part suffix)
JTAG / Configuration IEEE 1149.1 JTAG; passive serial / PS configuration supported (family-level) β€”
Manufacturer β€” Altera (acquired by Intel)
System Gates β€” 600,000
Logic Elements / Cells β€” 16,640
Total RAM Bits β€” 425,984
Number of I/O β€” 492
Core Voltage β€” 1.425 V to 1.575 V
Maximum Internal Frequency β€” 500 MHz
LVDS Support β€” True-LVDS up to 1 Gbps
Interface Standards β€” True-LVDS, LVPECL, PCML, HyperTransport
Configuration Modes β€” Passive Serial, Passive Parallel, JTAG

Datasheets & Resources

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