EP2A15B724C8 vs EP2A15B724C Vergleich
Detaillierter Direktvergleich von EP2A15B724C8 von Intel und EP2A15B724C von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2A15B724C8 | EP2A15B724C |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $185,00 | $195,00 |
| Family | APEX II | APEX II |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements | 16,640 | — |
| System Gates | 600,000 | — |
| Embedded RAM Bits | 425,984 | — |
| User I/O | 492 | — |
| Maximum Internal Frequency | 435 MHz | — |
| Pin-to-Pin Logic Delay (tPD) | 1.94 ns | — |
| Core Voltage | 1.5 V | — |
| Process Technology | 0.15 µm all-layer copper, up to 8 metal layers | 0.18 micron CMOS |
| High-Speed Serial Support | 1 Gbps True-LVDS, LVPECL, PCML, HyperTransport | — |
| PLLs | 4 | Yes (family-level, up to 4 per device) |
| Gehäuse | 724-pin FCBGA (flip-chip BGA) | 724-Ball FCBGA (FineLine BGA) |
| Montageart | Surface Mount | Surface Mount (BGA) |
| RoHS-Status | unknown | [DATA_NEEDED: RoHS compliance] |
| MSL-Level | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL rating] |
| Betriebstemperaturbereich | [DATA_NEEDED: operating temperature grade] | — |
| Logic Elements (LEs) | — | 16,640 |
| Maximum User I/O Pins | — | 492 |
| Embedded RAM | — | 425,984 bits |
| Maximum System Gates | — | Up to 1.5M gates (family-level) |
| Embedded System Blocks (ESBs) | — | Configurable as dual-port RAM / ROM / FIFO |
| Interconnect | — | MultiTrack, deterministic |
| I/O Standards | — | LVTTL, LVCMOS, LVDS, PCI, GTL+ (family-level) |
| Betriebstemperatur | — | [DATA_NEEDED: operating temperature grade] |
| Speed Grade | — | C (per suffix; specific speed bin [DATA_NEEDED]) |
| JTAG / Configuration | — | IEEE 1149.1 JTAG; passive serial / PS configuration supported (family-level) |