EP2A25F672C9N vs EP2A25F672ES Vergleich

Detaillierter Direktvergleich von EP2A25F672C9N von Intel und EP2A25F672ES von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP2A25F672C9N EP2A25F672ES
Marke Intel Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $195,00 $198,00
Family APEX II APEX II
Logic Elements / Cells 24320 —
System Gates Approx. 900000 —
Maximum User I/O 492 —
Operating Frequency 236 MHz —
Core Supply Voltage (VCCINT) 1.425 V to 1.575 V (nominal 1.5 V) —
Process Technology 0.15 µm all-layer copper, up to 8 metal layers 0.15 µm CMOS
Gehäuse 672-ball FineLine BGA (F672), 27 × 27 mm, 1.00 mm pitch 672-ball FC-FBGA
Montageart Surface Mount (BGA) —
Seated Height (max) 2.100 mm —
Propagation Delay 2.23 ns —
Logic Family CMOS —
Betriebstemperatur 0 °C to +85 °C (commercial, C9 grade) —
I/O Standards Supported LVTTL, LVCMOS, PCI, GTL+, SSTL-2/3, LVDS, LVPECL, PCML, HyperTransport —
LVDS Data Rate Up to 1 Gbps (True-LVDS) —
Configuration Interface Serial / Parallel PROM, JTAG, passive parallel (enhanced) —
Embedded Memory Enhanced System Blocks (ESBs) for dual-port RAM —
Design Software Quartus II (v5.1 or later) —
RoHS-Status Compliant (per distributor listings) Compliant
Logic Elements — 24,320
Maximum Gates — 900,000
Embedded System Blocks (ESBs) — 24
Maximum Embedded RAM — 1.4 Mbit
Maximum User I/O Pins — 492
Core Voltage — 1.5 V
Maximum System Clock Frequency — 500 MHz
Number of PLLs — 4
I/O Banks — 16
Supported I/O Standards — LVTTL, LVCMOS, PCI, LVDS, LVPECL, HSTL
Configuration Mode — Serial / Parallel / JTAG
Betriebstemperaturbereich — [DATA_NEEDED: operating temperature range]

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