EP2A25F672I6 vs EP2A25F672C8 Vergleich
Detaillierter Direktvergleich von EP2A25F672I6 von Intel und EP2A25F672C8 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2A25F672I6 | EP2A25F672C8 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $178,00 | $951,18 |
| Family | APEX II | APEX II (EP2A25) |
| Logic Elements (typical gates) | 25,000 | — |
| Fabric Architecture | SRAM-based LUT | — |
| Process Technology | 0.18 µm CMOS | 0.15 microm CMOS, 8-layer copper interconnect |
| Gehäuse | 672-ball FineLine BGA (FBGA-672) | 672-FBGA (FineLine BGA, 27x27 mm, 1.0 mm pitch) |
| Core Voltage | 1.5 V | — |
| Configuration Method | External SRAM configuration device (EPC series) | — |
| Temperature Grade | Industrial (-40 °C to +100 °C ambient) | — |
| Speed Grade | 6 | C8 |
| Embedded Memory | Embedded System Blocks (ESB), dual-port RAM / CAM | ESB blocks (dual-port RAM, FIFO, CAM, ROM) |
| DSP Blocks | MultiCore dedicated multipliers | — |
| Boundary Scan | JTAG (IEEE 1149.1) compliant | — |
| Clock Management | Dedicated PLL / clock tree circuitry | — |
| I/O Bank Count | [DATA_NEEDED: number of user I/O banks] | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | Non-compliant (legacy product) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| MSL-Level | [DATA_NEEDED: moisture sensitivity level] | — |
| Montageart | Surface Mount (BGA) | Surface Mount |
| Logic Elements | — | 25,000 (typical gates) |
| Maximum System Gates | — | 40,960 |
| Macrocells / Embedded Logic | — | 2,432 macros |
| User I/O Count | — | 492 |
| Propagation Delay (tpd) | — | 1.69 ns |
| Betriebstemperatur | — | 0 C to 85 C (commercial) |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI-X, GTL+, SSTL-2/3, HSTL, LVDS, LVPECL |
| LVDS Data Rate | — | 1 Gbps |
| PLL Count | — | 4 |
| I/O Banks | — | 16 |