EP2A40F1020C8 vs EP2A40F1020C8N Vergleich
Detaillierter Direktvergleich von EP2A40F1020C8 von Intel und EP2A40F1020C8N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2A40F1020C8 | EP2A40F1020C8N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $310,00 | $0,00 |
| Family | APEX II | — |
| Logic Family | CMOS | — |
| Process Technology | 0.15 µm all-layer copper, up to 8 metal layers | — |
| System Gates | 1,500,000 | — |
| Logic Cells | 38,400 | 38,400 |
| Macros / Macro Cells | 2,560 | — |
| Embedded RAM | [DATA_NEEDED: total ESB bits] | — |
| Maximum Internal Frequency | 376 MHz | — |
| Propagation Delay | 1.55 ns | — |
| User I/O Pins | 735 | — |
| Core Voltage (VCCINT) | 1.5 V | — |
| I/O Voltage (VCCIO) | MultiVolt 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V | — |
| Package Type | FC-FBGA (FineLine BGA) | FC-FBGA, BGA-1020 |
| Package Pin Count | 1020 | — |
| Package Dimensions | 33 x 33 mm | — |
| Ball Pitch | 1.0 mm | 1 mm |
| Betriebstemperatur | 0 C to +85 C (commercial, 'C' suffix) | 0 °C to 85 °C |
| RoHS-Status | [DATA_NEEDED: confirm per lot] | unknown |
| Configuration Interface | JTAG / Altera serial | — |
| Design Toolchain | Quartus II (legacy version 4.x or earlier recommended) | — |
| Product Type | — | Field-Programmable Gate Array (FPGA) |
| Device Family | — | APEX II |
| Logic Technology | — | CMOS |
| Logic Gates | — | 1.5 million |
| Nominal Supply Voltage | — | 1.5 V |
| Supply Voltage Range | — | 1.425 V to 1.575 V |
| User I/Os | — | 735 |
| Package Terminal Count | — | 1,020 pins |
| Package Body Size | — | 33 mm x 33 mm |
| Reported Operating Frequency | — | 376 MHz |
| Alternative Reported Frequency | — | 562 MHz |
| Reported Propagation Delay | — | 1.78 ns |
| Alternative Reported Propagation Delay | — | 1.55 ns |
| Fabrication Process | — | 0.15 µm |
| Maximum Reported Metal Layers | — | 8 layers |
| Montageart | — | Surface Mount |
| Terminal Form | — | Ball |
| REACH Status | — | unknown |
| AEC-Q100 Qualification | — | unknown |