EP2A40F672C6N vs EP2A40F672C6 Vergleich
Detaillierter Direktvergleich von EP2A40F672C6N von Intel und EP2A40F672C6 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2A40F672C6N | EP2A40F672C6 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $165,00 | $105,00 |
| Family | APEX II | APEX II |
| Logic Elements | 40,000 | — |
| Maximum System Gates | 1,125,000 | [DATA_NEEDED: maximum system gates] |
| Embedded RAM Bits | 442,368 | — |
| Embedded System Blocks (ESBs) | 160 | [DATA_NEEDED: ESB count] |
| Maximum User I/O Pins | [DATA_NEEDED: maximum user I/O count] | [DATA_NEEDED: max user I/O count] |
| Core Voltage | 1.5 V | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, GTL+, SSTL, HSTL, 1.8V/2.5V/3.3V/5V | — |
| Gehäuse | 672-ball FineLine BGA | 672-ball FineLine BGA (FBGA-672) |
| Betriebstemperatur | Commercial (0C to +85C) | Commercial (0C to +85C) |
| Speed Grade | C6 (per part number suffix) | C6 (commercial) |
| Configuration Methods | Passive Serial, Passive Parallel, JTAG | — |
| Montageart | Surface Mount | Surface Mount (BGA) |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Process Technology | SRAM-based, 0.18 um (per family datasheet) | 0.18-micron CMOS |
| PLL Count | [DATA_NEEDED: PLL count] | — |
| Device | — | EP2A40 |
| Logic Elements (typical) | — | 40,000 |
| Configuration Memory | — | SRAM-based |
| JTAG Support | — | Yes (IEEE 1149.1) |
| PLL Support | — | Yes |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Lifecycle | — | Obsolete / EOL (per Intel/Altera product discontinuation notice) |