EP2A70F1020C9 vs EP2A40F1020C7 Vergleich
Detaillierter Direktvergleich von EP2A70F1020C9 von Intel und EP2A40F1020C7 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2A70F1020C9 | EP2A40F1020C7 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $132,80 | $138,00 |
| Family | APEX II (APII) | APEX II |
| Manufacturer | Intel (formerly Altera) | — |
| Typical Gates | ~70,000 gates | — |
| Gehäuse | 1020-ball FBGA (FineLine BGA) | 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA) |
| User I/O Pins | 735 | — |
| Speed Grade | -9 (fastest) | — |
| Operating Temperature Grade | Commercial (C) | Industrial / per part suffix (C7) |
| Configuration Method | JTAG / passive serial / passive parallel | — |
| Core Voltage (VCCINT) | [DATA_NEEDED: VCCINT nominal value] | — |
| I/O Voltage (VCCIO) | [DATA_NEEDED: VCCIO nominal value] | — |
| On-chip Memory | EABs (Embedded Array Blocks) | — |
| Embedded Multipliers | Yes (DSP blocks in LABs) | — |
| Montageart | Surface Mount | Surface Mount |
| MSL-Level | 3 (JEDEC J-STD-020) | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance status] |
| Logic Elements / Cells | — | 38,400 |
| System Gates | — | 1.5 M |
| Macro Cells | — | 2,560 |
| User I/Os | — | 735 |
| Embedded Memory Bits | — | 655,360 bits |
| Core Voltage | — | 1.5 V |
| Maximum Internal Frequency | — | 562 MHz |
| Process Technology | — | 0.15 um CMOS, all-layer copper (up to 8 metal layers) |
| High-Speed Interface Support | — | 1 Gbps True-LVDS, LVPECL, PCML, HyperTransport |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |