EP2A70F1020C9 vs EP2A40F1020C7 Comparación
Comparación detallada lado a lado de EP2A70F1020C9 por Intel y EP2A40F1020C7 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP2A70F1020C9 | EP2A40F1020C7 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $132,80 | $138,00 |
| Family | APEX II (APII) | APEX II |
| Manufacturer | Intel (formerly Altera) | — |
| Typical Gates | ~70,000 gates | — |
| Encapsulado | 1020-ball FBGA (FineLine BGA) | 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA) |
| User I/O Pins | 735 | — |
| Speed Grade | -9 (fastest) | — |
| Operating Temperature Grade | Commercial (C) | Industrial / per part suffix (C7) |
| Configuration Method | JTAG / passive serial / passive parallel | — |
| Core Voltage (VCCINT) | [DATA_NEEDED: VCCINT nominal value] | — |
| I/O Voltage (VCCIO) | [DATA_NEEDED: VCCIO nominal value] | — |
| On-chip Memory | EABs (Embedded Array Blocks) | — |
| Embedded Multipliers | Yes (DSP blocks in LABs) | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Nivel MSL | 3 (JEDEC J-STD-020) | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance status] |
| Logic Elements / Cells | — | 38,400 |
| System Gates | — | 1.5 M |
| Macro Cells | — | 2,560 |
| User I/Os | — | 735 |
| Embedded Memory Bits | — | 655,360 bits |
| Core Voltage | — | 1.5 V |
| Maximum Internal Frequency | — | 562 MHz |
| Process Technology | — | 0.15 um CMOS, all-layer copper (up to 8 metal layers) |
| High-Speed Interface Support | — | 1 Gbps True-LVDS, LVPECL, PCML, HyperTransport |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |