EP2A70F1020C9 vs EP2A40F1020C7 Comparaison
Comparaison détaillée côte à côte de EP2A70F1020C9 par Intel et EP2A40F1020C7 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2A70F1020C9 | EP2A40F1020C7 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $132,80 | $138,00 |
| Family | APEX II (APII) | APEX II |
| Manufacturer | Intel (formerly Altera) | — |
| Typical Gates | ~70,000 gates | — |
| Boîtier | 1020-ball FBGA (FineLine BGA) | 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA) |
| User I/O Pins | 735 | — |
| Speed Grade | -9 (fastest) | — |
| Operating Temperature Grade | Commercial (C) | Industrial / per part suffix (C7) |
| Configuration Method | JTAG / passive serial / passive parallel | — |
| Core Voltage (VCCINT) | [DATA_NEEDED: VCCINT nominal value] | — |
| I/O Voltage (VCCIO) | [DATA_NEEDED: VCCIO nominal value] | — |
| On-chip Memory | EABs (Embedded Array Blocks) | — |
| Embedded Multipliers | Yes (DSP blocks in LABs) | — |
| Type de montage | Surface Mount | Surface Mount |
| Niveau MSL | 3 (JEDEC J-STD-020) | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance status] |
| Logic Elements / Cells | — | 38,400 |
| System Gates | — | 1.5 M |
| Macro Cells | — | 2,560 |
| User I/Os | — | 735 |
| Embedded Memory Bits | — | 655,360 bits |
| Core Voltage | — | 1.5 V |
| Maximum Internal Frequency | — | 562 MHz |
| Process Technology | — | 0.15 um CMOS, all-layer copper (up to 8 metal layers) |
| High-Speed Interface Support | — | 1 Gbps True-LVDS, LVPECL, PCML, HyperTransport |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |