EP2AGZ225FF35C4G vs EP2AGZ225FF35C3G Vergleich
Detaillierter Direktvergleich von EP2AGZ225FF35C4G von Intel und EP2AGZ225FF35C3G von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2AGZ225FF35C4G | EP2AGZ225FF35C3G |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,00 | $868,40 |
| Device Type | Field Programmable Gate Array (FPGA) | — |
| Manufacturer | Intel | — |
| Product Family | FPGA | — |
| User I/O | 554 I/O | — |
| Gehäuse | 1152FBGA | 1152-ball Flip-Chip BGA (FF35) |
| Package Type | Fine-pitch ball grid array | — |
| Logic Elements | [DATA_NEEDED: logic element count] | — |
| Embedded Memory | [DATA_NEEDED: embedded memory capacity] | [DATA_NEEDED: Mbits] |
| DSP Blocks | [DATA_NEEDED: DSP block count] | [DATA_NEEDED: count] |
| Transceivers | [DATA_NEEDED: transceiver count] | Up to 16 channels |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | 0C to +85C (Commercial) |
| Versorgungsspannung | [DATA_NEEDED: supply voltage] | — |
| I/O Standards | [DATA_NEEDED: supported I/O standards] | — |
| Configuration Method | [DATA_NEEDED: configuration method] | — |
| RoHS-Status | unknown | Compliant |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | not_applicable | — |
| Lead-Free Status | unknown | — |
| Halogen-Free Status | unknown | — |
| Family | — | Arria II GZ |
| Series | — | Arria II |
| Logic Elements (LE) | — | 225,000 |
| Package Size | — | 35 mm x 35 mm |
| Speed Grade | — | C3 |
| Transceiver Data Rate (max) | — | 6.375 Gbps |
| User I/O Banks | — | [DATA_NEEDED: count] |
| Maximum User I/O | — | [DATA_NEEDED: pin count] |
| Process Technology | — | 40 nm TSMC |
| Memory Controller Support | — | DDR3, DDR2, QDR II+ |
| PCI Express Hard IP | — | Yes (Gen1/Gen2) |
| Montageart | — | Surface Mount (BGA) |
| MSL-Level | — | 3 (per JEDEC J-STD-020) |
| Lead-Free | — | Yes |