EP2AGZ225FF35C4G vs EP2AGZ225FF35C3G 比較
詳細な並列比較: EP2AGZ225FF35C4G メーカー: Intel および EP2AGZ225FF35C3G メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP2AGZ225FF35C4G | EP2AGZ225FF35C3G |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $0.00 | $868.40 |
| Device Type | Field Programmable Gate Array (FPGA) | — |
| Manufacturer | Intel | — |
| Product Family | FPGA | — |
| User I/O | 554 I/O | — |
| パッケージ | 1152FBGA | 1152-ball Flip-Chip BGA (FF35) |
| Package Type | Fine-pitch ball grid array | — |
| Logic Elements | [DATA_NEEDED: logic element count] | — |
| Embedded Memory | [DATA_NEEDED: embedded memory capacity] | [DATA_NEEDED: Mbits] |
| DSP Blocks | [DATA_NEEDED: DSP block count] | [DATA_NEEDED: count] |
| Transceivers | [DATA_NEEDED: transceiver count] | Up to 16 channels |
| 動作温度 | [DATA_NEEDED: operating temperature range] | 0C to +85C (Commercial) |
| 電源電圧 | [DATA_NEEDED: supply voltage] | — |
| I/O Standards | [DATA_NEEDED: supported I/O standards] | — |
| Configuration Method | [DATA_NEEDED: configuration method] | — |
| RoHS ステータス | unknown | Compliant |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | not_applicable | — |
| Lead-Free Status | unknown | — |
| Halogen-Free Status | unknown | — |
| Family | — | Arria II GZ |
| Series | — | Arria II |
| Logic Elements (LE) | — | 225,000 |
| Package Size | — | 35 mm x 35 mm |
| Speed Grade | — | C3 |
| Transceiver Data Rate (max) | — | 6.375 Gbps |
| User I/O Banks | — | [DATA_NEEDED: count] |
| Maximum User I/O | — | [DATA_NEEDED: pin count] |
| Process Technology | — | 40 nm TSMC |
| Memory Controller Support | — | DDR3, DDR2, QDR II+ |
| PCI Express Hard IP | — | Yes (Gen1/Gen2) |
| 実装タイプ | — | Surface Mount (BGA) |
| MSLレベル | — | 3 (per JEDEC J-STD-020) |
| Lead-Free | — | Yes |