EP2S130F1020C5ES vs EP2S130F1020C5N Vergleich
Detaillierter Direktvergleich von EP2S130F1020C5ES von Altera und EP2S130F1020C5N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2S130F1020C5ES | EP2S130F1020C5N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.380,00 | $1.320,00 |
| Family | Stratix II | Stratix II |
| Logic Elements | 132,540 | 132,540 |
| Embedded Memory Bits | 6,747,840 | — |
| Maximum User I/Os | 742 | — |
| Process Technology | 90 nm | 90 nm |
| Core Voltage | 1.2 V | — |
| Maximum Internal Clock Frequency | 609.76 MHz | — |
| Speed Grade | -5 | — |
| Gehäuse | 1020-ball FC-FBGA (flip-chip BGA) | 1020-ball FC-FBGA (33x33 mm) |
| Operating Temperature (Junction) | 0C to 85C (commercial) | — |
| Logic Array Blocks (LABs) | 6,747 | — |
| Adaptive Logic Modules (ALMs) | 53,016 | 6627 LABs (per Jotrin listing) |
| Total RAM Blocks | [DATA_NEEDED: total RAM blocks] | — |
| Embedded DSP Blocks | [DATA_NEEDED: embedded DSP blocks count] | — |
| Embedded 18x18 Multipliers | [DATA_NEEDED: 18x18 multiplier count] | — |
| PLLs | [DATA_NEEDED: PLL count] | 4 (typical Stratix II feature) |
| Configuration | SRAM-based, JTAG/AS/PS modes | — |
| RoHS-Status | Compliant (lead-free) | [DATA_NEEDED: rohs status] |
| Montageart | Surface Mount | Surface Mount |
| Total Memory Bits | — | 6,747,840 bits |
| User I/Os | — | 734 |
| Core Supply Voltage (VCCINT) | — | 1.15 V to 1.25 V |
| Maximum Internal Frequency | — | 609.76 MHz |
| Betriebstemperatur | — | Commercial (0C to +85C, C5 grade) |
| Temperature Grade | — | C5 (other - per Partstack) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Global Clock Networks | — | 16 (typical Stratix II feature) |
| Configuration Method | — | Serial/Parallel via Quartus II (typical Stratix II) |
| Country of Origin | — | Republic of Korea (per GlobalSpec) |
| ECCN | — | 3A001.a.7.a (per GlobalSpec) |
| Estimated EOL Date | — | 2023 (per GlobalSpec) |