EP2S60F1020C4TT vs EP2S60F1020C4N Vergleich
Detaillierter Direktvergleich von EP2S60F1020C4TT von Intel und EP2S60F1020C4N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP2S60F1020C4TT - Stratix II FPGA, 60K LE, 1020-BGA | Intel
EP2S60F1020C4TT ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP2S60F1020C4TT | EP2S60F1020C4N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $720,00 | $67,00 |
| Family | Stratix II | Stratix II (EP2S60) |
| Process Technology | 90 nm | 90 nm CMOS |
| Logic Elements | 60,440 | 60,440 |
| Equivalent Logic Elements | 60,440 | — |
| Embedded Memory (bits) | 2,544,192 | 2,544,192 |
| Maximum User I/O | 718 | — |
| DSP Blocks (18x18 multipliers) | [DATA_NEEDED: DSP block count for EP2S60] | — |
| PLLs (Enhanced) | [DATA_NEEDED: PLL count] | — |
| Global Clock Networks | [DATA_NEEDED: global clock count] | — |
| Gehäuse | 1020-ball FineLine BGA | 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA) |
| Montageart | Surface Mount (BGA) | Surface Mount (BGA) |
| Betriebs-Sperrschichttemperatur | 0C to +85C (commercial, C4 speed grade) | — |
| Speed Grade | C4 | — |
| Supply Voltage Core | [DATA_NEEDED: VCCINT nominal] | — |
| Memory Interfaces Supported | DDR/DDR2 SDRAM, QDR II/II+ SRAM | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance] | EU RoHS compliant with exemption (per Arrow listing) |
| LE Conversion Note | 60,440 LEs is the legacy 'equivalent LE' figure; modern ALM-based naming differs | — |
| MSL-Level | [DATA_NEEDED: moisture sensitivity level] | — |
| Series | — | Stratix II |
| Adaptive Logic Modules (ALMs) | — | 30,220 (approx.) |
| Logic Array Blocks (LABs) | — | 3,022 |
| Embedded Memory Blocks | — | M512/M4K/M-RAM TriMatrix memory |
| DSP Blocks (18-bit x 18-bit) | — | Up to 48 (24 per DSP block column pair typical) |
| User I/Os | — | 718 |
| Maximum Core Frequency | — | 711.24 MHz (per Arrow listing) |
| Core Voltage | — | 1.2 V |
| Operating Temperature Grade | — | Commercial (C4 suffix indicates commercial, speed grade 4) |
| Configuration Modes | — | Passive Serial, Fast Passive Parallel, JTAG |
| PLLs / Clock Networks | — | Yes - on-chip PLLs and global clock networks |