EP2SGX60FF1152 vs EP2SGX60EF1152I4N Vergleich
Detaillierter Direktvergleich von EP2SGX60FF1152 von Altera und EP2SGX60EF1152I4N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP2SGX60FF1152 - Stratix II GX FPGA 60K LE 1152-BGA | Altera
EP2SGX60FF1152 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP2SGX60FF1152 | EP2SGX60EF1152I4N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.950,00 | $0,00 |
| Series | Stratix II GX | — |
| Family | Stratix II GX FPGA | — |
| Logic Elements | 60,440 | — |
| Embedded Memory | 2,544,192 bits | 2,544,192 bits |
| DSP Blocks (18x18 Multipliers) | 192 (16 blocks) | — |
| Maximum User I/O | 364 | — |
| Number of LABs/CLBs | 3022 | — |
| Transceivers | 12 channels up to 3.125 Gbps | — |
| Gehäuse | 1152-BBGA, FineLine BGA (FF1152) | 1,152-ball FBGA |
| Betriebstemperatur | -40C to +85C (industrial) | — |
| Voltage - Supply | 1.2 V core / multiple VCCIO rails | — |
| Montageart | Surface Mount | Surface mount |
| Process Technology | 90 nm CMOS, SRAM-based | — |
| Configuration Method | JTAG IEEE 1149.1, Serial, Passive Parallel, Fast Passive Parallel | — |
| RoHS-Status | Compliant | — |
| Device Type | — | FPGA |
| Product Family | — | Stratix II GX |
| Logic Cells | — | 60,440 |
| I/O Count | — | 534 |
| Internal Frequency | — | 717 MHz |
| Versorgungsspannung | — | 1.2 V |
| Package Type | — | Other, 23 x 23 mm, 1 mm pitch, MS-034AAJ-1, FBGA-484 |
| Pins | — | 484 |
| Device Technology | — | 90 nm |
| Logic Blocks | — | 3,022 LABs |
| Operating Temperature Grade | — | Industrial |
| Compliance | — | [DATA_NEEDED: compliance certification details] |
| Transceiver Count | — | [DATA_NEEDED: high-speed transceiver count] |
| Configuration Memory | — | [DATA_NEEDED: configuration memory specification] |
| Package Pinout | — | [DATA_NEEDED: complete ball-map pinout] |