EP2SGX60FF1152 vs EP2SGX60EF1152I4N Comparaison
Comparaison détaillée côte à côte de EP2SGX60FF1152 par Altera et EP2SGX60EF1152I4N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2SGX60FF1152 | EP2SGX60EF1152I4N |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1 950,00 | $0,00 |
| Series | Stratix II GX | — |
| Family | Stratix II GX FPGA | — |
| Logic Elements | 60,440 | — |
| Embedded Memory | 2,544,192 bits | 2,544,192 bits |
| DSP Blocks (18x18 Multipliers) | 192 (16 blocks) | — |
| Maximum User I/O | 364 | — |
| Number of LABs/CLBs | 3022 | — |
| Transceivers | 12 channels up to 3.125 Gbps | — |
| Boîtier | 1152-BBGA, FineLine BGA (FF1152) | 1,152-ball FBGA |
| Température de fonctionnement | -40C to +85C (industrial) | — |
| Voltage - Supply | 1.2 V core / multiple VCCIO rails | — |
| Type de montage | Surface Mount | Surface mount |
| Process Technology | 90 nm CMOS, SRAM-based | — |
| Configuration Method | JTAG IEEE 1149.1, Serial, Passive Parallel, Fast Passive Parallel | — |
| Statut RoHS | Compliant | — |
| Device Type | — | FPGA |
| Product Family | — | Stratix II GX |
| Logic Cells | — | 60,440 |
| I/O Count | — | 534 |
| Internal Frequency | — | 717 MHz |
| Tension d'alimentation | — | 1.2 V |
| Package Type | — | Other, 23 x 23 mm, 1 mm pitch, MS-034AAJ-1, FBGA-484 |
| Pins | — | 484 |
| Device Technology | — | 90 nm |
| Logic Blocks | — | 3,022 LABs |
| Operating Temperature Grade | — | Industrial |
| Compliance | — | [DATA_NEEDED: compliance certification details] |
| Transceiver Count | — | [DATA_NEEDED: high-speed transceiver count] |
| Configuration Memory | — | [DATA_NEEDED: configuration memory specification] |
| Package Pinout | — | [DATA_NEEDED: complete ball-map pinout] |