EP3SE110F1152C4 vs EP3SE110F1152C3N Vergleich

Detaillierter Direktvergleich von EP3SE110F1152C4 von Intel und EP3SE110F1152C3N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Intel
EP3SE110F1152C4 EP3SE110F1152C4 - Stratix III E FPGA 107.5K LE 1152-FCBGA | Intel

EP3SE110F1152C4 - Stratix III E FPGA 107.5K LE 1152-FCBGA | Intel

EP3SE110F1152C4 ⚠ Letzte Bestellmöglichkeit
Intel
EP3SE110F1152C3N EP3SE110F1152C3N - Stratix III E FPGA, 107.5K LE, FC-FBGA-1152 | Intel

EP3SE110F1152C3N - Stratix III E FPGA, 107.5K LE, FC-FBGA-1152 | Intel

EP3SE110F1152C3N ⚠ Letzte Bestellmöglichkeit

Spezifikationsvergleich

Parameter EP3SE110F1152C4 EP3SE110F1152C3N
Marke Intel Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Letzte Kaufgelegenheit Letzte Kaufgelegenheit
Lagerstatus In Stock In Stock
Stückpreis (USD) $2.200,00 $1.560,00
Family Stratix III E Stratix III E
Logic Elements 107,500 —
Embedded Memory 8,936,448 bits —
Maximum User I/Os 744 —
DSP Blocks [DATA_NEEDED: 18x18 multiplier count] Yes (embedded multipliers)
Logic Array Blocks (LABs) [DATA_NEEDED: LAB count] 4,300
Process Technology 65 nm 65 nm TSMC
Core Voltage 1.1 V —
Maximum Performance 450 MHz —
Package Type 1152-ball FCBGA (Flip-Chip BGA) FC-FBGA-1152 (flip-chip BGA)
Operating Temperature Grade Commercial (C4) —
Configuration Memory SRAM-based (volatile) —
On-chip Termination Dynamic, programmable —
I/O Standards Supported LVDS, LVTTL, LVCMOS, HSTL, SSTL —
RoHS-Status Compliant —
Series — Stratix III
Logic Elements (LE) — 107,500
Total RAM Bits — 8,936,448
User I/Os — 744
Operating Frequency (max) — 500 MHz
Core Supply Voltage — 1.1 V nominal
I/O Supply Voltage — [DATA_NEEDED: I/O supply range]
Betriebstemperatur — 0 °C to 85 °C (commercial)
Speed Grade — C3
Montageart — Surface Mount
Montagestil — SMD/SMT (Tray)
Speichertyp — M9K and M144K block RAM
External Memory Support — DDR/DDR2/DDR3 with read/write leveling
Boundary Scan — IEEE 1149.1 (JTAG)
RoHS — [DATA_NEEDED: RoHS status]
Lead-Free — Yes (per Altera/Intel datasheet family convention)

Datenblätter & Ressourcen

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