EP3SE110F1152C4N vs EP3SE110F1152C3N Vergleich

Detaillierter Direktvergleich von EP3SE110F1152C4N von Intel und EP3SE110F1152C3N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Intel
EP3SE110F1152C4N EP3SE110F1152C4N - Stratix III E FPGA, 107.5K LE, 1152-FCBGA | Intel

EP3SE110F1152C4N - Stratix III E FPGA, 107.5K LE, 1152-FCBGA | Intel

EP3SE110F1152C4N ⚠ Letzte Bestellmöglichkeit
Intel
EP3SE110F1152C3N EP3SE110F1152C3N - Stratix III E FPGA, 107.5K LE, FC-FBGA-1152 | Intel

EP3SE110F1152C3N - Stratix III E FPGA, 107.5K LE, FC-FBGA-1152 | Intel

EP3SE110F1152C3N ⚠ Letzte Bestellmöglichkeit

Spezifikationsvergleich

Parameter EP3SE110F1152C4N EP3SE110F1152C3N
Marke Intel Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Letzte Kaufgelegenheit Letzte Kaufgelegenheit
Lagerstatus In Stock In Stock
Stückpreis (USD) $1.395,00 $1.560,00
Family Stratix III Enhanced (E) Stratix III E
Logic Elements 107,500 —
Memory Bits 8,936,448 —
Embedded Multipliers (18x18) 896 —
Logic Array Blocks (LABs) 4300 4,300
User I/O Pins 744 —
Core Voltage 1.1 V —
Process Technology 65 nm 65 nm TSMC
Maximum Operating Frequency 450 MHz —
Gehäuse 1152-ball FCBGA (Flip-Chip BGA) —
Montageart Surface Mount Surface Mount
Betriebstemperatur 0C to +85C (Commercial) 0 °C to 85 °C (commercial)
Configuration Method Passive Serial / Fast Passive Parallel / JTAG / AES-256 —
RoHS-Status Compliant —
MSL-Level 3 (168 hours) —
Design Software Quartus II (v9.1 or later) —
Series — Stratix III
Logic Elements (LE) — 107,500
Total RAM Bits — 8,936,448
User I/Os — 744
Operating Frequency (max) — 500 MHz
Core Supply Voltage — 1.1 V nominal
I/O Supply Voltage — [DATA_NEEDED: I/O supply range]
Package Type — FC-FBGA-1152 (flip-chip BGA)
Speed Grade — C3
Montagestil — SMD/SMT (Tray)
DSP Blocks — Yes (embedded multipliers)
Speichertyp — M9K and M144K block RAM
External Memory Support — DDR/DDR2/DDR3 with read/write leveling
Boundary Scan — IEEE 1149.1 (JTAG)
RoHS — [DATA_NEEDED: RoHS status]
Lead-Free — Yes (per Altera/Intel datasheet family convention)

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