EP3SE260F1152C2 vs EP3SE110F1152C3N Vergleich
Detaillierter Direktvergleich von EP3SE260F1152C2 von Intel und EP3SE110F1152C3N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP3SE110F1152C3N - Stratix III E FPGA, 107.5K LE, FC-FBGA-1152 | Intel
EP3SE110F1152C3N ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP3SE260F1152C2 | EP3SE110F1152C3N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $2.400,00 | $1.560,00 |
| Manufacturer | Intel (formerly Altera) | — |
| Series | Stratix® III E | Stratix III |
| Logic Elements (LE) | 255,000 | 107,500 |
| Logic Array Blocks (LABs) | 10,200 | 4,300 |
| Embedded Memory (bits) | 16,672,768 | — |
| User I/Os | 744 | 744 |
| User I/O Banks | [DATA_NEEDED: I/O bank count] | — |
| Core Voltage (VCCINT) | 1.1 V | — |
| Process Technology | 65 nm CMOS | 65 nm TSMC |
| Gehäuse | 1152-ball FC-FBGA (Flip Chip) | — |
| Montageart | Surface Mount | Surface Mount |
| Speed Grade | C2 (commercial) | C3 |
| Betriebstemperatur | Commercial (0 °C to +85 °C junction) [DATA_NEEDED: exact TJ limits] | 0 °C to 85 °C (commercial) |
| RoHS-Status | Compliant | — |
| Lead-Free | Yes | Yes (per Altera/Intel datasheet family convention) |
| MSL-Level | [DATA_NEEDED: MSL rating] | — |
| Design Software | Quartus II (Stratix III support) | — |
| Family | — | Stratix III E |
| Total RAM Bits | — | 8,936,448 |
| Operating Frequency (max) | — | 500 MHz |
| Core Supply Voltage | — | 1.1 V nominal |
| I/O Supply Voltage | — | [DATA_NEEDED: I/O supply range] |
| Package Type | — | FC-FBGA-1152 (flip-chip BGA) |
| Montagestil | — | SMD/SMT (Tray) |
| DSP Blocks | — | Yes (embedded multipliers) |
| Speichertyp | — | M9K and M144K block RAM |
| External Memory Support | — | DDR/DDR2/DDR3 with read/write leveling |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |
| RoHS | — | [DATA_NEEDED: RoHS status] |