EP3SE260H780C3N vs EP3SE260H780C4N Vergleich
Detaillierter Direktvergleich von EP3SE260H780C3N von Intel und EP3SE260H780C4N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP3SE260H780C3N - Stratix III E FPGA, 255K LE, 780-BGA | Intel / Altera
EP3SE260H780C3N ✓ AktivSpezifikationsvergleich
| Parameter | EP3SE260H780C3N | EP3SE260H780C4N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.325,00 | $1.395,00 |
| Series | Stratix® III E | — |
| Logic Elements (LE) | 255,000 | — |
| Embedded Memory (bits) | 16,672,768 | — |
| Number of LABs/CLBs | 10,200 | — |
| User I/Os | 488 | — |
| Number of Pins / Balls | 780 | — |
| Gehäuse | 780-BBGA, FCBGA (H780) | 780-ball FCBGA (Flip Chip BGA) |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | 0 °C to +85 °C (C grade, commercial) | 0C to +85C (commercial) |
| Process Technology | 40 nm CMOS | — |
| Maximum Core Frequency | [DATA_NEEDED: maximum core frequency MHz] | — |
| Supply Voltage (VCCINT) | [DATA_NEEDED: VCCINT nominal V] | — |
| Transceivers | [DATA_NEEDED: number of embedded transceivers and max data rate] | — |
| DSP Blocks | [DATA_NEEDED: number of DSP blocks and precision] | — |
| RoHS-Status | Compliant (lead-free 'N' suffix) | — |
| Feuchtigkeitsempfindlichkeitsgrad (MSL) | [DATA_NEEDED: MSL level per JEDEC J-STD-020] | 3 (168 hours) |
| Configuration Method | SRAM-based, configured via JTAG / passive / active serial / fast passive parallel | Serial/Parallel via Quartus II |
| Design Toolchain | Altera Quartus II (legacy); Intel Quartus Prime | — |
| Family | — | Stratix III E (Enhanced) |
| Logic Elements | — | 255,000 |
| Logic Array Blocks (LABs) | — | 10,200 |
| Total RAM Bits | — | 16,672,768 |
| Embedded Memory | — | M9K and M144K blocks |
| User I/O Pins | — | 488 |
| DSP Blocks (18x18 Multipliers) | — | 768 |
| PLLs | — | 12 |
| Process Node | — | 65 nm CMOS |
| Core Voltage | — | 0.86 V to 1.15 V |
| Maximum Core Clock Frequency | — | 450 MHz |