EP610PC-20T vs EP610PC-25T Vergleich

Detaillierter Direktvergleich von EP610PC-20T von Intel und EP610PC-25T von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Intel
EP610PC-25T EP610PC-25T - 16-Macrocell Classic EPLD, 25ns, PDIP-24 | Intel / Altera

EP610PC-25T - 16-Macrocell Classic EPLD, 25ns, PDIP-24 | Intel / Altera

EP610PC-25T ⚠ Letzte Bestellmöglichkeit

Spezifikationsvergleich

Parameter EP610PC-20T EP610PC-25T
Marke Intel Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus NRND Letzte Kaufgelegenheit
Lagerstatus In Stock In Stock
Stückpreis (USD) $7,20 $28,95
Family Classic EPLD —
Logic Elements / Macrocells 16 macrocells —
Usable Gates 300 gates —
Propagation Delay (tPD) 20 ns 25 ns (speed grade 25)
Maximum Frequency (fMAX) 62.5 MHz —
Pipelined Data Rate up to 100 MHz up to 100 MHz
Supply Voltage (VCC) 5 V 5 V
Number of Dedicated Inputs 16 —
Number of I/O Pins 16 —
Programmable Output Enable Yes (per macrocell) —
Gehäuse 24-pin PDIP (Plastic DIP) PDIP-24 (Plastic DIP, 24-pin, 0.300 in row spacing)
Montageart Through-Hole Through-hole
Betriebstemperatur 0C to +70C (Commercial) 0 °C to +70 °C (commercial)
Programming Technology UV-erasable EPROM, CMOS —
Development Tool MAX+PLUS II —
RoHS-Status unknown [DATA_NEEDED: RoHS status]
Manufacturer — Intel (formerly Altera)
Distributor / Stocking Source — Rochester Electronics, LLC
Device Family — Altera Classic EPLD - EP610
Device Type — Erasable Programmable Logic Device (EPLD, OTP for plastic package)
Logic Capacity — 300 usable gates
Macro Cells — 16
Registers — 16
User I/Os — 16
Maximum Toggle Frequency — [DATA_NEEDED: max fmax]
Process Technology — ECMOS (CMOS, EPROM-based)
Pinout Compatibility — Pin-compatible with EP610DC-25 (CERDIP-24, windowed)
Programming Method — OTP (one-time programmable) via Altera programming hardware
Shipping Form (T suffix) — Tube

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