EP610PC-20T vs EP610PC-25T 对比

详细并排对比 EP610PC-20T 出自 Intel 和 EP610PC-25T 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP610PC-20T EP610PC-25T
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 最后采购期
库存状态 有库存 有库存
单价(USD) $7.20 $28.95
Family Classic EPLD —
Logic Elements / Macrocells 16 macrocells —
Usable Gates 300 gates —
Propagation Delay (tPD) 20 ns 25 ns (speed grade 25)
Maximum Frequency (fMAX) 62.5 MHz —
Pipelined Data Rate up to 100 MHz up to 100 MHz
Supply Voltage (VCC) 5 V 5 V
Number of Dedicated Inputs 16 —
Number of I/O Pins 16 —
Programmable Output Enable Yes (per macrocell) —
封装 24-pin PDIP (Plastic DIP) PDIP-24 (Plastic DIP, 24-pin, 0.300 in row spacing)
安装类型 Through-Hole Through-hole
工作温度 0C to +70C (Commercial) 0 °C to +70 °C (commercial)
Programming Technology UV-erasable EPROM, CMOS —
Development Tool MAX+PLUS II —
RoHS 状态 unknown [DATA_NEEDED: RoHS status]
Manufacturer — Intel (formerly Altera)
Distributor / Stocking Source — Rochester Electronics, LLC
Device Family — Altera Classic EPLD - EP610
Device Type — Erasable Programmable Logic Device (EPLD, OTP for plastic package)
Logic Capacity — 300 usable gates
Macro Cells — 16
Registers — 16
User I/Os — 16
Maximum Toggle Frequency — [DATA_NEEDED: max fmax]
Process Technology — ECMOS (CMOS, EPROM-based)
Pinout Compatibility — Pin-compatible with EP610DC-25 (CERDIP-24, windowed)
Programming Method — OTP (one-time programmable) via Altera programming hardware
Shipping Form (T suffix) — Tube

数据手册与资源

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