EP910DI-30 vs EP910DM-40 Vergleich

Detaillierter Direktvergleich von EP910DI-30 von Rochester Electronics und EP910DM-40 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP910DI-30 EP910DM-40
Marke Rochester Electronics Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus NRND Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $17,60 $21,00
Product Type UV-Erasable Programmable Logic Device (EPLD) UV Erasable Programmable Logic Device (EPLD)
Family Classic EPLD (Altera EP910 series) Altera Classic EP910
Macrocell Count 24 —
Propagation Delay (tpd) 30 ns —
Maximum Toggle Frequency (fmax) 62 MHz —
Supply Voltage (VCC) 5 V (single supply) —
Technology CMOS, UV-erasable EPROM —
Gehäuse CDIP-40 (ceramic DIP, 40-pin with UV window) 40-pin Ceramic DIP (Cerdip) with UV window
Montageart Through-Hole (DIP) Through-Hole (DIP)
Dedicated Inputs 10 36
Dedicated I/O Pins 12 (12 input + 12 output) —
Output Enable Pins 2 —
Pin-Anzahl 40 —
Programmable Logic Element JEDEC fuse map (3rd-party programmer) —
Betriebstemperatur -40C to +85C (industrial) [DATA_NEEDED: operating temperature range]
RoHS-Status [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS compliance status]
Manufacturer (Original) Altera (now Intel PSG) —
Current Distributor / Authorized Aftermarket Rochester Electronics, LLC —
Architecture — PAL-type AND/OR with global programmable interconnect bus
Macrocells — 24
Dedicated Outputs — 24
Bidirectional I/O Lines — 24
Product Terms — 240
Propagation Delay (tPD) — 40 ns
External Clocks — 2
Process Technology — CMOS
Versorgungsspannung — 5 V
Programming Interface — JEDEC-standard fuse-map / UV erasure

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